Hi,
Looking at the documentation around the MFENCE instruction, it has a number of restrictions but none of them preclude placing it in a branch delay slot. At different points, it states that MFENCE stalls the core (suggesting that it is permitted to place it in branch delay slots) and that MFENCE is similar to a multi-cycle NOP (suggesting that it is *not* permitted). The assembler does not complain if I place MFENCE in the delay slots.
Can some someone confirm one way or the other, whether I can safely put an MFENCE in the delay slots of a branch?
Thanks in advance,
SPH