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Clock frequency limits

Brian Niebuhr
Intellectual 335 points
Other Parts Discussed in Thread: OMAP-L138

I have a question regarding some discrepancies between the OMAP-L138 datasheet (SPRS586F) and the OMAP L138 clock calculation spreadsheet at http://processors.wiki.ti.com/index.php/Programming_PLL_Controllers_on_OMAP-L1x8/C674x/AM18xx.  I understand that the datasheet is the definitive source, but I'm wondering if I'm missing some information from the datasheet.  Here are my questions:

1. Datasheet table 5-5 says that the ASYNC1 domain can go up to 148 MHz at 1.2V and 1.3V if used in asynchronous (not SDRAM) mode.  The spreadsheet limits it to 100 MHz.  Is it ok to go up to 148 MHz if not using SDRAM on EMIFA, or are there other limitations?

2. Datasheet table 5-5 says that PLL1_SYSCLK1 can go up to 312 MHz at 1.2V and 1.3V.  The spreadsheet allows PLL1:SYSCLK1 to go up to 312 MHz, but then DDR_CLK and DDR_CLK_N are limited to 150 MHz on the DDR2_mDDR page.  I started looking around and the only reference I can find to a 150 MHz limitation in the datasheet is table 2-1 (and that limitation is for mDDR only).  That's kind of an odd place to put an important limit like that, so I wanted to clarify what the real limit was.

Thanks for any help you can give.

  • 0
    TI__Expert 4760 points

    Hi Brain,

    Datasheet table 5-5 says that the ASYNC1 domain can go up to 148 MHz at 1.2V and 1.3V if used in asynchronous (not SDRAM) mode.  The spreadsheet limits it to 100 MHz.  Is it ok to go up to 148 MHz if not using SDRAM on EMIFA, or are there other limitations

    Answer: The spreadsheet target for SDRAM limitation .If you’re using Asynchronous mode you can go up to 148MHz.In future we can add option in the spreadsheet to differentiate Asynchronous & SDRAM mode frequency limitation.

    Datasheet table 5-5 says that PLL1_SYSCLK1 can go up to 312 MHz at 1.2V and 1.3V.  The spreadsheet allows PLL1:SYSCLK1 to go up to 312 MHz, but then DDR_CLK and DDR_CLK_N are limited to 150 MHz on the DDR2_mDDR page.  I started looking around and the only reference I can find to a 150 MHz limitation in the datasheet is table 2-1 (and that limitation is for mDDR only).  That's kind of an odd place to put an important limit like that, so I wanted to clarify what the real limit was.

    Answer: We took mDDR for maximum frequency limitation in the spreadsheet .You can go up to 156 MHz if you’re using DDR2 .In future we will add drop down list option to select the DDR device (DDR or mDDR) and based on that we differentiate the frequency limitation.

    Thanks for pointing it out

    Regards

    Antony

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