EMIF Speed Decrease

Sean Thornton1

Hey guys,

So a customer is trying to fab a bunch of boards with Sitara on them. However, he has only qual'd a previous silicon revision of Sitara (May 2012 data sheet) on his board that ran the EMIF clock at 606MHz. The new silicon revision (v2.1) according to the April 2013 datasheet online runs the EMIF clock now at 800 MHz, not 606MHz.

If he dropped the new silicon revision of Sitara onto his circuit board with the faster EMIF (800MHz), would he have any problems (with/without dialing down the clock to 606MHz)?

He doesn't care about speed at this point and is primarily concerned that he doesn't waste the money to FAB a bunch of boards using the new revision of Sitara, just to find out that they don't work after the fact.

I would appreciate any assistance that can point me in the right direction on this issue!

Thanks,

Sean

over 11 years ago

0 Biser Gatchev-XID over 11 years ago

TI__Guru**** 393215 points

Hi Sean,

The EMIF clock frequencies concerned are 400MHz and 303MHz. The double frequencies you mention are the memory data rates. EMIF clock frequency is derived from the DDR PLL, which is programmed during processor initialization. In short - the new silicon revision should work directly with 303MHz DDR clock.

0 Sean Thornton1 over 11 years ago in reply to Biser Gatchev-XID

TI__Expert 5210 points

Just to make sure I have this right, does this mean that the customer need to take NO action at all in throttling the frequency on the new revision (this is accomplished during processor initialization)?

0 Biser Gatchev-XID over 11 years ago in reply to Sean Thornton1

TI__Guru**** 393215 points

Well, I don't know what software they are using. We just checked the latest SDK and DDR3 clock there is configured depending on values read from board EEPROM (for TI EVM's) - either 303MHz or 400MHz. They should check but I think it will work without any changes. Keep me informed, we'll help if there is a problem.

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EMIF Speed Decrease