why the setting is same no matter the format setting as follows?
switch (fmt & SND_SOC_DAIFMT_INV_MASK) { case SND_SOC_DAIFMT_IB_NF: mcasp_clr_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL); mcasp_clr_bits(base + DAVINCI_MCASP_TXFMCTL_REG, FSXPOL);
mcasp_set_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL); mcasp_clr_bits(base + DAVINCI_MCASP_RXFMCTL_REG, FSRPOL); break;
case SND_SOC_DAIFMT_NB_IF: mcasp_set_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL); mcasp_set_bits(base + DAVINCI_MCASP_TXFMCTL_REG, FSXPOL);
mcasp_clr_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL); mcasp_set_bits(base + DAVINCI_MCASP_RXFMCTL_REG, FSRPOL); break;
case SND_SOC_DAIFMT_IB_IF: mcasp_clr_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL); mcasp_set_bits(base + DAVINCI_MCASP_TXFMCTL_REG, FSXPOL);
mcasp_set_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL); mcasp_set_bits(base + DAVINCI_MCASP_RXFMCTL_REG, FSRPOL); break;
case SND_SOC_DAIFMT_NB_NF: mcasp_set_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL); mcasp_clr_bits(base + DAVINCI_MCASP_TXFMCTL_REG, FSXPOL);
mcasp_clr_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL); mcasp_clr_bits(base + DAVINCI_MCASP_RXFMCTL_REG, FSRPOL); break;
default: return -EINVAL; }
cheers,
