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VPIF to L2 problem

omer keilaf
Prodigy 90 points
Other Parts Discussed in Thread: OMAPL138

Hi

im having a problem working with the VPIF. Im trying to read frames from an external sensor

to the internal L2 RAM. I would like to use a double buffer for each several lines

but it seems that the all frame is written without me being able to change it (trtying to change C0TLUMA)

since the frame is very large, the frame is written to the all L2 memory and overflows.

I cannot work through the DDR since I need to make calcualtions in real time.

L2 is not configured to cache mode. 

Im working in progressive mode, 12bit data ( top channel only ) ,its not clear when can the VPIF DMA controller can be modified.

Thanks, I would appriciate your prompt help

  • 0
    TI__Mastermind 20790 points

    Hi,

    Please share the details of TI processor/device which is used by you.
    How are you configuring VPIF through BIOS or register level?

  • 0 in reply to Pubesh
    Prodigy 90 points

    Hi

    we are working with the TI C6748 

    and our code relies on  the starterware VPIF loopback example

    meaning that we configure the VPIF at register level

  • 0 in reply to omer keilaf
    TI__Mastermind 20790 points

    Omer Keila,

    Please verify the cache memory, If the DSP cache has a cache line from some memory outside of L2,
    The VPIF DMA's data into that memory, the cache controller will not know about it
    The cache controller can then corrupt that memory.

  • 0 in reply to Pubesh
    Prodigy 90 points

    the L2 is not used for cache. Im aware of this problem

    im asking a different question.

    the image im getting is about 2.5MB ( HD image) , I would like to do some signal processing to the image before I copy it to the DDR SDRAM . this means that my plan was to get interrupt per N lines ( using a double buffer)

    while each time configuring the VPIF DMA to write the following lines to the other buffer .

    it seems that the VPIF DMA is limited in a way that it cannot be updated during a frame. 

    if that is the case, it seems that I cannot receive the image to the DSP L2 ( since its not big enought) and I need to first copy it to the SDRAM.  that is a problem for me.

    this is a yes no question. can I configure the VPIF DMA to write the data to L2 memory , while every several lines redirect it toa different address in the L2 ?  

    when does the DMA controller of the VPIF recheck its congifuration? is it only between frames? is it possible to update its configuration at any time? 

    please, this is urgent.

    Thanks,

    Omer

     

  • 0 in reply to omer keilaf
    TI__Mastermind 20790 points

    Omer,

    1. Channel-0 supports HD capture in Rec.1120 Format.
    2. Channel-2 supports HD display in Rec.1120 Format.
    VPIF driver is not tested for HD because of Hardware constraints.

    The VPIF module is used to receive and transmit video data on C6748/OMAPL138.
    The VPIF module has two input channels to receive video byte stream data and two
    output channels with which video byte stream can be asserted.