AM335x nand boot problem

Jelle Sels

We are currently facing some problems when trying to boot from a nand on a am335x based device.
We can boot the device via mmc and uart. We are able to read and write to the device, when the device is booted via mmc or uart. The nand is even detected by the linux kernel.
When we boot the device, it stops sending C over the uart after a couple of seconds.We see that the device is stuck in the Undefined exception default handler(adress 0x20080),when we add a jtag debugger to it.

Sysboot:        0x4104
Trace vector 0: 0x000090FE
Trace vector 1:   0x0001F000
Trace vector 2:   0x00011030
Nand type : Spansion S34ML04G200BHI000 (4Gbit,Manufacturer ID: 0x01, Chip ID: 0xdc)
   Bus size:        8 bit
   Block size:       64 Pages
   Spare size:       64 bytes
   Plane size:       2048 Blocks
   Device size:   2 planes

over 11 years ago

0 Biser Gatchev-XID over 11 years ago

TI__Guru**** 393215 points

Do you have the R/B signal of your NAND connected to GPMC_WAIT0 with an external pullup resistor on the line?

0 Jelle Sels over 11 years ago in reply to Biser Gatchev-XID

Prodigy 120 points

No, GPMC_WAIT0 is connected directly to the R/B signal without the use of a pull up. Is this needed?
We didn't use a pull-up on a previous layout of the board ( which had a different nand). This board booted correctly via the nand.

0 Biser Gatchev-XID over 11 years ago in reply to Jelle Sels

TI__Guru**** 393215 points

Generally it's needed because R/B is an open-drain output on most NANDs. Can you see if R/B toggles when you try to boot from NAND?

0 Jelle Sels over 11 years ago in reply to Biser Gatchev-XID

Prodigy 120 points

We added a pull up to the gpmc_wait0 but still no luck. I can see the gpmc_wait0 signal toggle when the device is trying to read the nand. Can you tell me if we also need a pullup at GPMC_CSn0 and GPMC_WPn.

0 Biser Gatchev-XID over 11 years ago in reply to Jelle Sels

TI__Guru**** 393215 points

Not necessarily, but they are usually added to hold these lines in the defined inactive state while the processor is initializing and during low-power modes.

0 Jelle Sels over 11 years ago in reply to Biser Gatchev-XID

Prodigy 120 points

I added the pullup resistor to the r/b signal of the nand. It still isn't booting and the trace values are still the same.

Do you have any clue what the problem could be?

I got the following signal when measuring the r/b signal of the nand.

0 Biser Gatchev-XID over 11 years ago in reply to Jelle Sels

TI__Guru**** 393215 points

Can you tell me how have you programmed the NAND?

0 Jelle Sels over 11 years ago in reply to Biser Gatchev-XID

Prodigy 120 points

I use the following commands in u-boot

fatload mmc 0 0x82000000 MLO;nand erase 0 0x20000;nand write 0x82000000 0 0x20000;nand erase 0x20000 0x20000;nand write 0x82000000 0x40000 0x20000;nand erase 0x40000 0x20000;nand write 0x82000000 0x40000 0x20000;nand erase 0x60000 0x20000;nand write 0x82000000 0x60000 0x20000

fatload mmc 0 0x82000000 u-boot.img; nand erase 0x00080000 0x0060000;nand write 0x82000000 0x00080000 0x60000

0 Miroslav Kiradzhiyski XID over 11 years ago in reply to Jelle Sels

TI__Mastermind 25235 points

According to the steps you posted, you are leaving address 0x20000 empty (you are writing to 0x40000 twice). Please correct this. The ROM code expects the following NAND layout: http://processors.wiki.ti.com/index.php/AM335x_U-Boot_User%27s_Guide#NAND_Layout

Best regards,
Miroslav

0 Jelle Sels over 11 years ago in reply to Miroslav Kiradzhiyski XID

Prodigy 120 points

I changed it(was a typo). It didn't have any influence sadly.

0 Jelle Sels over 11 years ago in reply to Jelle Sels

Prodigy 120 points

I found the problem. My configuration in uboot was wrong. I'm able to boot now when I flash the MLO of the silicas pengwynboard to the nand.

Thanks for all your support.

0 Jelle Sels over 11 years ago in reply to Jelle Sels

Prodigy 120 points

I was wrong, still can boot from the nand flash.Is there a way to debug the mlo with code composer and jtag when booting from nand?

Is trace vector 0 bit 1 the main function of the rom or is it that the rom is running some other code?

Trace vector 2 bit 16 states that the device is Executeing GP image. Thus this mean that the processor has loaded the image from the nand?

Trace vector 3 states that we aren't booting from nand(bit 3).

The MLO which is included with the pengwynboard isn't working on our device, while it works on the pengwynboard.

0 Jelle Sels over 11 years ago in reply to Jelle Sels

Prodigy 120 points

If i put a breakpoint at adress 0x402f0410 it stop when booting from the mmc. When I boot from nand it doesn't stop at adress 0x402f0410.

0 Jelle Sels over 11 years ago in reply to Jelle Sels

Prodigy 120 points

The rom code isn't loading the MLO from the nand. I can't read the MLO data when I add the debugger and read adress 0x400F0400. I can read the MLO if I do the same thing while booting from the mmc or when I boot from then pengwynboard nand flash.

0 Biser Gatchev-XID over 11 years ago in reply to Jelle Sels

TI__Guru**** 393215 points

Can you tell your SYSBOOT settings?

0 Biser Gatchev-XID over 11 years ago in reply to Biser Gatchev-XID

TI__Guru**** 393215 points

Can you read the contents of the control_status register (0x44E1_0040) at the time when the board doesn't boot?

0 Jelle Sels over 11 years ago in reply to Biser Gatchev-XID

Prodigy 120 points

I think there's somethin wrong with the ecc. I'm able to boot the system,when I disable the hardware ecc via sysboot pin 9. I'm using u-boot v2012.10. Isn't uboot standard using bch8? Does the rom code use bch8 standard. Which register can a check for the ecc algortime?

0 Biser Gatchev-XID over 11 years ago in reply to Jelle Sels

TI__Guru**** 393215 points

According to the AM335X TRM, Rev.I, page 4695:

"ECC Correction

The default ECC correction applied is BCH 8b/sector using the GPMC and ELM hardware.

For device ID codes D3h, C3h, D5h, C5h, D7h, C7h, DEh, CEh when manufacturer code (first ID byte) is 98h the Cell type information is checked in the 4th byte of ID data. If it is equal to 10b then the ECC correction applied is BCH 16b/sector.

In addition ECC computation done by the ROM can be turned off completely by using SYSBOOT[9]. This is particularly useful when interfacing with NAND devices that have built in ECC engines."

0 Jelle Sels over 11 years ago in reply to Biser Gatchev-XID

Prodigy 120 points

Is there no method which I can use to determine what the problem really is? The result is even the same when I use the TI nand-flash-writer (bch8).

0 Moti Shani over 10 years ago in reply to Jelle Sels

Prodigy 10 points

In same problem with evm am335x, I've notice that MLO file have 0x200 bytes which aren't relevant when reading MLO from nand.

So, assuming fatload MLO into 0x80000000, I wrote only from 0x80000200.

nand write 0x80000200 0x0 0x20000

Moti

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AM335x nand boot problem