Hi All,
I have an 18-bit ADC I need to hook-up to C6748 DSP and just wondering if possible to configure the two channels on C6748 uPP (DATA and XDATA) to perform 32bit wide data reads?
Thanks,
J
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Hi All,
I have an 18-bit ADC I need to hook-up to C6748 DSP and just wondering if possible to configure the two channels on C6748 uPP (DATA and XDATA) to perform 32bit wide data reads?
Thanks,
J
John,
The uPP peripheral supports any data word width between 8 to 16 bits.
Please have a look at the below wiki for configure the UPP with ADC
http://processors.wiki.ti.com/index.php/Introduction_to_uPP
Kindly see the section "2.5.8 Data Format" in the UPP user guide
http://www.ti.com/lit/sprugj5
Thanks for the reply.
The 16bit maximum data width is specified per upp channel. My thinking is to have both uPP channels configured to read two 16bit words and DMA the data to different memory blocks. In software we can reconstruct the 32bit words, but my worry is if the latency in transfer between the two channels DMAs could result in wrong data being merge together.
Regards,
J
John,
Your idea is correct. I think so, it won't give the more latency.
The test code of uPP available at upp_bios_drv_v10. You can customise that code and test on your setup.