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How does the OMAP-L138 decide what an "Edge Trigger" is for a GPIO Pin?

Mike Geppert
Expert 1980 points
Other Parts Discussed in Thread: OMAP-L138

We are trying to trigger off of both edges of a GPIO pin.

The Falling edge works well but the rising edge is giving us multiple interrupts.

Admittedly the rising edge has a really long rise  time (200uSec +) but is clean of noise.  It looks like we are getting about 3 interrupts from this long rising edge.  They seem to be 7 to 10 uSec apart.

We did change the code from both interrupts to looking for a falling, then inside the ISR we clear the Falling and set rising.  Then when in the ISR the next time we clear the falling and look for rising, but we still get interrupts on the risinged edge when looking for falling edge.

I assume there is an indeterminet state where the pin is getting both rising and falling edges at the same time?

Thanks,

  • 0
    TI__Expert 4760 points

    Hi Mike,

    I can understand from your explanation the falling edge works well and you’re facing issue with the raising edge, you’ve changed both the edges to falling, but still you’re facing an intermediate state where the pin is getting both rising and falling edges at the same time right?

    Have you checked the GPIO edge interrupt registers are set properly?

    Can you please give me some more information on that?

    Regards

    Antony

  • 0 in reply to Antony Samsunil
    Expert 1980 points

    Hi Antony,

    I think the Falling edge works well because it is a relativly fast edge.

    The Rising edge has more then a 200uSec rise time.

    The set/clr rising/falling edge registers all have a 0x0200 in them for Bank 8.

    We actully changed the code to only look for falling, then once a falling occurs look for a rising, Then once a rising occurs switch it back to falling.  This still gives us 3 ISRs about 7 to 10 uSec apart at the time the rising edge occures.  Out of the 200 uSec rise time, it looks like we are in some kind of indeterminet area for about 30 uSec were both edges seem to be valid.

    so the question becomes how does the GPIO edge trigger logic work?

    Thanks so much for your time...

  • 0 in reply to Mike Geppert
    TI__Expert 4760 points

     

    Mike,

    May i how do you drive this pin? From a switch or an external daughterboard drives this pin.

    Did you add any delay in between the code and check once?

    All we have is the Datasheet and TRM to explain the GPIO edge trigger logic. 

    Regards

    Antony

  • 0 in reply to Antony Samsunil
    Expert 1980 points

    This is a custom board that uses the OMAP-L138.

    The Hardware was designed by a third party.

    The Pin is being driven from a Power Supply Board that is conneceted to the Processor via a Back Plane.

    The Pin indicates that Power is about to go away by going low.  However, it is posible the power comes back and that is when the pin goes high.  We need to see both edges.

    The pin is routed to both the NMI and a GPIO pin.  (I have no idea why they routed it to the NMI, it seems like a real pain).  The issue is that we are getting multiple interrupts on the rising edge.  Currently we wait 100uSec and that seems to stop the multiple edges being triggered, but that is a 100uSec that we cant do anything with when we are in fact supposed to be starting up again.

     

  • 0 in reply to Mike Geppert
    TI__Expert 4760 points

    Mike,

    Have you tried probing the interrupt signal? For measuring the signal settling time & overshoot that cause double clocking...etc.

    What is the trace length of the interrupt signal travelling from the power supply board to the processor backplane? Try to shorten the signal transmission length and check once.

    Remove the board from the backplane and drive the interrupt signal from an external supply through switch and see will you able to reproduce this issue.

    Regards

    Antony

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