vpss load err after Watchdogtime reset

Away.liu

Hi:

I use dvr_rdk 3.5 platform and set 8168 watchdog time 60seconds.

After watchdog reset the system,It commit a err when run "./load_vpss.sh".It can't be load after watchdog reset system.If I reset it by hand reset switch or power off/on ,it run ok.

The print info are as follows:

Unhandled fault: external abort on non-linefetch (0x1808) at 0xf9020000
Internal error: : 1808 [#1]
last sysfs file: /sys/kernel/uevent_seqnum
Modules linked in: syslink
CPU: 0 Not tainted (2.6.37 #13)
PC is at DM8168DUCATIMMU_enable+0x60/0xa0 [syslink]
LR is at DM8168DUCATIMMU_enable+0x28/0xa0 [syslink]
pc : [<bf0171dc>] lr : [<bf0171a4>] psr: 00000013
sp : cb7acff0 ip : d4e01000 fp : cb7ad004
r10: 00000000 r9 : cb7ac000 r8 : bf0af4e4
r7 : bf07c98c r6 : d4dfe000 r5 : 00000000 r4 : d4dfe000
r3 : 00010000 r2 : f9020000 r1 : 00060000 r0 : bf0613d3
Flags: nzcv IRQs on FIQs on Mode SVC_32 ISA ARM Segment user
Control: 10c5387d Table: 8c260019 DAC: 00000015
Process fw_load.out (pid: 968, stack limit = 0xcb7ac2e8)
Stack: (0xcb7acff0 to 0xcb7ae000)

Are there someone meet this similar phenomenon ? How to solve it if i want watchdog time reset and run to well?

over 12 years ago

0 Reshma Prabhu over 11 years ago

TI__Prodigy 510 points

Hi,

Watchdog reset is a warm reset and hence it doesn't reset all the modules. This is the reason for the above hang/ errors.

Please try this uboot patch :

Fullscreen 0434.watchdog_cold_reset.patch.txt Download

diff --git a/arch/arm/cpu/arm_cortexa8/start.S b/arch/arm/cpu/arm_cortexa8/start.S
index 423b01b..260dbc7 100644
--- a/arch/arm/cpu/arm_cortexa8/start.S
+++ b/arch/arm/cpu/arm_cortexa8/start.S
@@ -95,6 +95,11 @@ FIQ_STACK_START:
 	.word 0x0badc0de
 #endif
 
+
+#define PRM_DEVICE_RSTTST 0x481800A8
+prm_device_rsttst:
+ .word PRM_DEVICE_RSTTST
+
 /*
  * the actual reset code
  */
@@ -107,6 +112,15 @@ reset:
 	bic	r0, r0, #0x1f
 	orr	r0, r0, #0xd3
 	msr	cpsr,r0
+  /*Force cold reset if a 
+   warm reset is detected*/
+  ldr r0, prm_device_rsttst
+  ldr r1, [r0]
+  str r1, [r0]
+  cmp r1, #2
+  beq reset_cpu
+  cmp r1, #8
+  beq reset_cpu
 
 #if (CONFIG_OMAP34XX)
 	/* Copy vectors to mask ROM indirect addr */
diff --git a/board/ti/ti8168_dvr/dvr.c b/board/ti/ti8168_dvr/dvr.c
index d6ab5f1..38733f2 100644
--- a/board/ti/ti8168_dvr/dvr.c
+++ b/board/ti/ti8168_dvr/dvr.c
@@ -1246,6 +1246,8 @@ void s_init(u32 in_ddr)
 #ifdef CONFIG_TI816X_VOLT_SCALE
 	voltage_scale_init();
 #endif
+
+  udelay(100);
 }
 
 /* optionally do something like blinking LED */

. This patch is for ti816x UD works dvr and has uboot changes to detect a warm reset and force cold reset.

Please refer to thread http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/716/p/276202/1026048.aspx#1026048 for more details on the above changes.

Regards,

Reshma

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vpss load err after Watchdogtime reset