Hello,
I am having a problem with a custom board based on BeagleBone schematics and TI's Linux. We detect the problem because sometimes, when we boot the system, we see the TFT screen flickering.
The Pixel Clock, which is configured to 30MHz, is just 10MHz (looked with an oscilloscope). We check the registers values (peripheral and pll registers), and they are as expected (look at the values):
REG VALUE AT 0x4830E004 (LCD-->CTRL register) => 0x00000901
REG VALUE AT 0x44E00448 (CM_WKUP-->CM_IDLEST_DPLL_DISP register) => 0x00000001
REG VALUE AT 0x44E00454 (CM_WKUP-->CM_CLKSEL_DPLL_DISP register) => 0x00000C00
REG VALUE AT 0x44E00498 (CM_WKUP-->CM_CLKMODE_DPLL_DISP register) => 0x00000007
REG VALUE AT 0x44E004A4 (CM_WKUP-->CM_DIV_M2_DPLL_DISP register) => 0x00000201
Other peripherals (UART, I2C, Core...) work as expected, with good timings (also the master oscillator, 25MHz crystal, is working fine). We reconfigure the LCD peripheral registers, with no result, but if we reconfigure the PLL (with the microcontroller's reference manual sequence, in page 899, chapter 8.1.6.10.1), the PLL relocks to the good 30MHz frecuency with no problem.
I have traced the PLL configuration in the kernel to dpll3xxx.c, and everything seems to be OK.
My question is why sometimes the PLL locks to a bad frequency during booting, even if the registers are correct, and how can I solve this problem.
Thank you,
Mikel