I am planning to use PCM1792A as highest quality monaural audio DAC in 24-bit, 192 kS/s I2S configuration. I therefore need the following clock signals:
1. System clock for filters and modulators, 49.152 MHz (mcbsp_clks, CLKS)
2. Audio data clock, 12.288 MHz (mcbsp2_clkx, CLKX)
3. Frame synchronization clock 192 kHz (mcbsp2_fsx, FSX).
I would prefer to generate these three clock signals by the OMAP3530 on the Beagleboard from
the 26 MHz using DPPL4 or DPLL5.
Is this possible and if it is how should I set up the DPLL?
If not what should I do to generate those clocks?