Hello,
I am trying to evaluate a system using c667x with two different memory devices connected to ddr3 interface.
Currently I am working on c6670 evm.
In my future system design each memory device would be connected to one of the chip selects so I can have independent acces to each of them. Each device would use 16 data lines.
I know that on the evm only cs0 is used.
1.Is it possible to test it on the evm by configuring the controller to use cs0 and cs1 and read from an address on cs1 domain even though there isn't any device connected to it?
2. Should the two memory devices I plan to use need to be the same?
3. Can the ddr3 controller read from a device that is not a sram memory device, e.g. a fifo?
4.Is there a way to test read throughput from ddr3?
Thanks,
Ronen