Hi,
I have an OMAP EVM (Rev D) with a TI OMAP 35xx Rev B processor board and a T4030 power module. I'm also using the CE 6 BSP. I want to ensure that VDD1 and VDD2 enter sleep when the processor enters sleep. I've made sure that VDD1 and VDD1 are in the P1 group. When the unit is told to suspend VDD1 and VDD2 do not enter low power. I've monitored both nSleep lines and neither change state. I've also monitored the Smartreflex I2C (4) bus and there is no activity on it. Any ideas?
Thanks