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Use of Timer Capture Functionality on OMAP 4430

Other Parts Discussed in Thread: 4430

I am using a OMAP 4430 (on a duovero) to capture pulses from a radio transmitter connected to a Pin on my board (one of the GPIO´s that connect to Timer 11 to be precise).

After setting up the muxing for the Pin to work as an Input and activate the Timer 11 Capture Functionality I get the interrupts I want.

However, I have to restart Timer 11 in every interrupt I get (with "omap_dm_timer_start()"). While this seems to work fine, I really expected to be able to capture the value of Timer 11 "on the fly".

Is "on the fly" capture possible? And, in that case, what do I need to configure differently?

  • Hello,

    In Capture mode the GP TIMERS in omap work as follows:
     - when transition (rising edge, falling edge or both depending on the setting of TCLR[9:8] TCM bit field ) is detected on the input pin the timer value from the TCRR register is detected and saved in the TCAR1 (or TCAR2) registers.

    - If GPT_TCLR[13] CAPT_MODE=0 then on the first capture event (rising edge, falling edge or both) the value of the counter TCRR is saved in TCAR1 and all next events are ignored until the detection logic is reset or the GPT_TISR[2]TCAR_IT_FLAG bit is cleared by writing 1 to it.

    - If GPT_TCLR[13] CAPT_MODE=0 then the on the first capture event the value of TCRR is saved in TCAR1, on the second event the value of TCRR is saved in TCAR2 and if the capture interrupt is enabled the interrupt is generated on the second event . All next events (after the second capture event) are ignored until the detection logic is reset or the GPT_TISR[2]TCAR_IT_FLAG bit is cleared by writing 1 to it.

    See Section 22.2.4.7 Capture Mode Functionality in OMAP4430 TRM.

    So the behaviour of timer 11 you described (you need to reset the capture functionality each time an interrupt is generated) is expected.

    Best Regards,

    Yordan

  • That is just that. According to the OMAP TRM (if you continue reading below the section in the TRM that you mention above):

    "The edge detection logic is reset (a new capture is enabled) when the active capture interrupt is served. The GPT_TISR[2] TCAR_IT_FLAG bit or the GPT_IRQSTATUS[2] TCAR_IT_FLAG (previously 1) is cleared by writing 1 to it or when the edge detection mode bits (the GPT_TCLR[9:8] TCM bit field) are changed from no-capture mode detection to any other mode."

    I have tried the first two options by:

    (For the TISR register.)

    "__raw_writel(0, timer:ptr->func_base + OMAP_TIMER_TISR_REG);"

    (For the Interrupt Flag)

    "omap_dm_timer_write_status(timer->ptr, OMAP_TIMER_INT_CAPTURE);
    omap_dm_timer_read_status(timer_ptr);

    I still have to resort to "omap_dm_timer_start()" to get it to work (otherwise it just stops counting). Therefore I thought I was perhaps dealing with some configuration issue.

    But you are saying that the way of resetting the capture functionality is actually via "omap_dm_timer_start()"? (If possible I would avoid such an ambiguous call.)

  • Hello,

    As I see you are trying to write "0" in the TISR register: "__raw_writel(0, timer:ptr->func_base+OMAP_TIMER_TISR);" But writing "0" in GPT_TISR[2] or GPT_IRQSTATUS[2] has no effect.

    Both GPT_TISR[2]TCAR_IT_FLAG & GPT_IRQSTATUS[2] TCAR_IT_FLAG bits are cleared when you write "1" in them.

    Best Regards,

    Yordan

  • Sure, I was writing from my memory of my last try. Actually I have tried both, since the TRM A) in 22.2.4.7 states that I should write 1 and B) in the register description says that it resets to 0 and 1 is equal to "Capture interrupt request" (so I wasn´t sure whether you should actually write 1 to the register, since it seems it will be 1 when there has been an interrupt).

    Nevertheless. Previous drivers I have encountered have simply used the other way I described:

    omap_dm_timer_write_status(timer->ptr, OMAP_TIMER_INT_CAPTURE);
    omap_dm_timer_read_status(timer_ptr);

    So, I was confident that I was resetting the edge detection logic (either with this way or with trying to write 0 or 1 to TISR). May be that I am assuming too much.

    Returning to my original question:

    A) In addition to resetting the edge detection logic you should not need to do anything to keep the clock running?

    B) The preferred way of doing this through the clock interface is "omap_dm_timer_start()"? (Remember, I am simply trying to understand if there are better ways since I seem confined to the OMAP Clock Interface to get things to work.)

  • Hello Fredrik, 

    To my knowledge you should not need to do anything to keep the clock running when you reset the edge detection logic.

    Just for clarification does your driver writes to the appropriate interrupt status register? Note that when using timer1, timer2 and timer10 you should write 1 to GPT_TISR to reset the timer edge detection logic. For the other timers ( in your case timer 11) you should write to GPT _IRQSTATUS[2] TCAR_IT_FLAG to reset your timer11 edge detection logic.

    Best Regards,

    Yordan