OMAP L138 Standalone problems running with SYS\BIOS 6

Yoel Motola

Expert 1470 points

Other Parts Discussed in Thread: OMAP-L138, 4213

This problem was posted here also:

http://e2e.ti.com/support/dsp/omap_applications_processors/f/42/p/290173/1027881.aspx#1027881

I have a custom board which has the Logic PD Omap L138 SOM on it (ARM9+C6748).

I have a program built in SYS\BIOS 6.34.2.18 working with the ARM and the DSP, communicating by IPC 1.25.0.04.

I manage to load ARM only program working with SYS\BIOS to the SPI1 Flash and run the board in standalone mode but when I try to run the whole 2 processors program, it doesn't work. I tried debugging the code but It just hangs in random places before to IPC start is over.

I'm pretty sure I made the AIS files fine (according to the "C6000 Embedded Design Workshop Using BIOS - Booting From Flash").

I read all the tutorials and Wikis but there is something I'm missing.

My guess is that there is a problem with the DSP wakeup sequence but I can't find what.

I use sfh_OMAP-L138.exe VER 1.67 to burn the SPI Flash using UART2.

I attached a simple program that blinks a led on my custom board so you can look at, Here:

4213.Omap_Tes.rar

It's important to mention that in debug mode the program works perfectly.

I hope someone here knows how to solve this problem cause it is crucial for me.

Thanks,

Yoel

over 11 years ago

0 Steven Connell over 11 years ago

TI__Mastermind 45025 points

Hi Yoel,

Yoel Motola said:
It's important to mention that in debug mode the program works perfectly.

What do you mean by debug mode? Can you please clarify on this a little? Do you mean that when you build the application for debug mode (as opposed to release mode) AND load/run the app to/from FLASH, then it works OK?

Or maybe you mean when you just load/run out of RAM, then the application works (but as soon as you try to flash it, it does not work)?

Yoel Motola said:
I manage to load ARM only program working with SYS\BIOS to the SPI1 Flash and run the board in standalone mode but when I try to run the whole 2 processors program, it doesn't work.

Have you tried to run a (single core) DSP app out of FLASH? If not can you try to flash a basic BIOS app that does not use IPC and see if that works out of FLASH?

Yoel Motola said:
I tried debugging the code but It just hangs in random places before to IPC start is over.

How far do you get on the DSP side? Are you able to set break points? If so, can you try putting a break point in main()? Do you reach it? If you halt the DSP, where are you at in the dis/assembly window?

Can you also try using the ROV tool (Tools -> RTOS Object Viewer)? This tool allows you to get some insight into what's going on in BIOS. You can check things like Task states, heap size and usage, and so on. There's also a "scan for errors" feature in the BIOS module that you can try running.

Steve

0 Yoel Motola over 11 years ago in reply to Steven Connell

Expert 1470 points

Hey Steve,

Thanks for your help!

When I say debug mode, I meant emulation mode, connecting to each core with the Jtag and running it (The ARM wakes up the DSP).

I found the problem.

I did tell the ARM where the code starts in the DSP core but I didn't wake it up (In my Concetro, the SYS\BIOS does that simply by checking a box in the config file).

In the DSP side, I needed to add the following line to the .cmd file:

.text:_c_int00: align=1024 > 0x80010000

At the ARM side, I had to add the following function before the IPC_Start:

/* Wake up the DSP */
Void DSPWakeup()
{
// Open Permissions to SYSCFG Registers (Not required for PG2.0 silicon and above)
HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_KICK0R) = 0x83e70b13;
HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_KICK1R) = 0x95A4F1E0;

/* Set DSP boot address vector to entry point of DSP program
This must be aligned to 1KB boundaries */
HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_HOST1CFG) = 0x80010000;

/*
* Write a 3h to the NEXT bit in the DSP local power sleep controller (LPSC) module control register
* (PSC0.MDCTL15) to prepare the DSP module for an enable transition (to enable the clocks and all
* transitioning from the SwRstDisable state to Enable state)
*/
HWREG(SOC_PSC_0_REGS + PSC_MDCTL(HW_PSC_DSP)) |= 0x00000003;

/*
* Write a 1 to the GO[1] bit (DSP subsystem is part of the PD_DSP domain) in the power domain
* transition command register (PSC0.PTCMD) to start the state transition sequence for the DSP module
*/
HWREG(SOC_PSC_0_REGS + PSC_PTCMD) |= 0x00000002;

/*
* Check (poll for 0) the GOSTAT[1] bit in the power domain transition status register (PSC0.PTSTAT) for
* power transition sequence completion. The domain is only safely in the new state after the GOSTAT[1]
* bit is cleared to 0
*/
unsigned int gostat1 = HWREG(SOC_PSC_0_REGS + PSC_PTSTAT);
while((gostat1&PSC_PTSTAT_GOSTAT1)!=0);

/*
* Write a 1 to the LRST bit in PSC0.MDCTL15 to release the DSP local reset controlled by the PSC
* module
*/
HWREG(SOC_PSC_0_REGS + PSC_MDCTL(HW_PSC_DSP)) |= 0x00000100;
}

Hope that will help others.

Yoel

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OMAP L138 Standalone problems running with SYS\BIOS 6