For last couple of days I have been trying to configure GPIO 100, 101, 102 and 105 as an interrupt source. Following are the steps I did to configure the pins
In PADCONF_X registers addresses
0x48002118[15:0] for GPIO 100 and 0x48002118[31:16] for 101
0x4800211C[15:0] for GPIO 102 and 0x48002120[31:16] for 105, I have set the MUXMODE to 0b100 (0x4) to set the pad to Mode4 and INPUTENABLE bit to 0b1 (0x1) to allow input Since this pins belongs to GPIO BANK4 (0x49054000) , I have set the corresponding bits in OE (offset 0x0034), FALLINGDETECT (offset 0x004C) and SETIRQENABLE1 (offset 0x0064) to 0b1 and turned of RISINGDETECT, since I care only the rising edge detection. I have also setup INR appropreatly, however, when the device generates interrupt on any of these pin, I do not see ISR called. This driver is written in WindowsCE 6.0. This drivers was working in or previous platform (PXA270 running Windows CE5.0), ultimatley this will be mgrated to linux, we are doing CE6.0 migration as a transition due to marketing needes. One thing surprises me, when I dump the content of the PAD configuration register, I do not see the bits I have modified has not changed, it stayed the same and all three bits in MUXMODE are set, indicating the pad is in safe mode (Mode7) This is first time I am using a OMAP3530 processor, I am sure I am doing something wrong here, can some one help me solve the problem. Thanks