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AM3517/05 GPMC timeout control not working

Donald Zhang
Prodigy 100 points


I am talking to a FPGA on one of the CS on my GPMC interface.  The interface is setup to do synchronous read/write multiplexed access, with wait monitoring enabled for the read access.  I would like to use the error timeout feature in case the FPGA becomes unresponsive during an access and the wait never goes deasserted, the interface wouldn't hang.  I programed 0x6E000040 with value 0x00001FF1.  Now a write access still works but when I try to do a read with the timeout feature enabled I get a seg fault. 

Any ideas?

Thanks

  • 0
    TI__Guru**** 393215 points
    Hi Donald,
     
    In the AM35X TRM section 9.1.5.12, at the bottom it says:
     
    "The GPMC does not generate interrupts on these errors. True abort to the MPU or interrupt generation is handled at interconnect level."
     
    I'm afraid I can't say how this is handled at the L3 interconnect level.
  • 0 in reply to Biser Gatchev-XID
    Prodigy 100 points

    Hi Biser,

    Thanks for the reply.  I don't think the problem I am having right now is due to interrupt handling.  i already have the normal read access with wait monitoring to the FPGA working, however as soon as I enable the timeout register I get a seg fault when I do a read access.  I don't expect the time out register to time out in the first place.  I scoped the gpmc interface during the access and didn't see any transaction happen at all when I have the timeout enable.

    Thanks

    Donald

  • 0 in reply to Donald Zhang
    TI__Guru**** 393215 points
    Hi Donald,
     
    Just an idea: have you tried to set the timeout value and then enable the timeout in two separate steps (possibly do a read in between to make sure)?
  • 0 in reply to Biser Gatchev-XID
    Prodigy 100 points

    Hi Biser,

    Yes that seem to have fixed my problem.  Is this the expected behavior? 

    Thanks

    Donald

  • 0 in reply to Donald Zhang
    TI__Guru**** 393215 points
    I can't say Donald. I just had a feeling that the timeout timer might need to be initialized before enabling it. The TRM doesn't give enough details on this.
  • 0 in reply to Biser Gatchev-XID
    Prodigy 100 points

    Thanks Biser.  There are many other registers in the SBC that are setup similarly, where the enable bit of a function is in the same register as the settings for that function.  Would you say as a rule in all of these cases the configuration of the function settings and enabling of the function need to be two separate writes?  By the same logic should you need to disable the function first before changing its settings?  This seems to be a very important procedure that should have been made clear if it is necessary?

    Thanks

    Donald

  • 0 in reply to Donald Zhang
    TI__Guru**** 393215 points
    In my opinion it's not a general solution. It's different depending on the preipheral. For example UARTs have to be stopped before reconfiguring, so are most timers. Some peripherals can be changed on the fly. In this case my thought was that loading and enabling the timer simultaneously could possibly cause the timeout to trigger, seeing that the timer value is 0x0 before that.