• State Resolved
  • Locked Locked
  • Replies 3 replies
  • Subscribers 98 subscribers
  • Views 565 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

missing EDMA TCC interrupt

Flamingo
Expert 2290 points
Other Parts Discussed in Thread: OMAP-L137

Using OMAP-L137, I have DMA channel 8 performing a DMA memory-to-memory transfer. The associated IPR bit is set when the transfer completes. (I can poll for completion successfully.)
I am now trying to tie the same transfer to an interrupt. I already have an interrupt working on HWI7 for a GPIO input.
I have now tried mapping HWI6 to event 8, which I believe is the Transfer Completion interrupt. When that didn't work, I tried HWI8 and HWI7. In all cases, the GPIO interrupt continued to work (even when it was switched to HWI8).
Although I can still poll IPR for completion successfully, the ISR is not entered. See various snippets below.

server.tcf:
/* Currently, HWI7 is the DMA interrupt */
bios.HWI.instance("HWI_INT7").interruptSelectNumber = 8;
bios.HWI.instance("HWI_INT7").fxn = prog.extern("SPI_DMA_tcc_intr");
bios.HWI.instance("HWI_INT7").useDispatcher = 1;
bios.HWI.instance("HWI_INT7").interruptMask = "all";

/* Currently, HWI8 is the GPIO input interrupt */
bios.HWI.instance("HWI_INT8").interruptSelectNumber = 65;
bios.HWI.instance("HWI_INT8").fxn = prog.extern("MSI_ctl_intr");
bios.HWI.instance("HWI_INT8").useDispatcher = 1;
bios.HWI.instance("HWI_INT8").interruptMask = "all";

ISRs:
void MSI_ctl_intr()
{
    SEM_postBinary(&SEM_MSIready);
}

void SPI_DMA_tcc_intr()
{
    MCKINLEY_LED_setall((UInt16)(0x8));        //lights an LED
    SEM_postBinary(&SEM_collect);
}

Interrupt setup:
    C64_clearIFR(C64_EINT7|C64_EINT8);
    C64_enableIER (C64_EINT7|C64_EINT8);

DMA setup:
#define CollectionDMA 8

    bcnt = 1000;
    acnt = 2;
    pParam[0] = (0x00900000 | (CollectionDMA << 12));
    pParam[1] = (UInt32)(&FakeData[0]);        //Source
    pParam[2] = (bcnt<<16)+acnt;
    pParam[3] = (UInt32)dstPtr;                //Destination
    pParam[4] = (acnt<<16) + acnt;            //In the memory to memory copy, but indices are 2 (same as acnt).
    pParam[5] = 0xFFFF;
    pParam[6] = 0;
    pParam[7] = 1;
    *icr = (0x01 << CollectionDMA);
    *secr = 0xFFFFFFF;
    *eesr = (0x01 << CollectionDMA);
    *iesr = (0x01 << CollectionDMA);
    *esr = (0x01 << CollectionDMA);

where icr, secr, eesr, iesr, and esr are pointers to the associated EDMA registers. The data is transferred. The appropriate IPR bit is clear before triggering the transfer and set after timing out SEM_pendBinary. I am not using a shadow region. Both the source and destination buffers are plenty large enough to hold the data.

I've tested the LED and, using the same call, I can light it in the background task or the GPIO input ISR. I'm pretty sure that I'm not getting the TCC interrupt, but I don't know why. The code is identical to the polled version except that I've added the interrupt enable and the write to *iesr. What more do I need to do to get the interrupt?

  • 0
    Expert 2290 points

    Here is an update. I feared that perhaps my timeout was too short, so I've been verifying that the transfer actually occurred. I'm initializing the destination buffer to zeroes. After the timeout, I check each value in the destination buffer for a zero value. None of them are zero. I've also verified that the values in the destination buffer are correct. That is, the destination buffer is a copy of the source buffer. I've also tried different timeouts. The destination buffer is a copy of the source buffer all the way down to 1/100th of the timeout I use (suggesting that my timeout is too long, but further suggesting that the interrupt had plenty of time to assert).

    The old rev of the OMAP-L137 did not list a particular event (DSP interrupt event) for the transfer complete interrupt. The December 2008 version lists event 8 as "EDMA3_CC0_INT1" (EDMA3 CC0 Region 1 interrupt). I don't see another event that is associated with EDMA. Is this the one I'm supposed to use? Does it mean that I have to set up my DMA through Shadow Region 1 to see the interrupts? (I'm not currently using shadow regions.)

     

  • 0 in reply to Flamingo
    TI__Guru*** 125430 points

    Funny, I received practically the same question from another customer.  My conclusion after looking through the documentation is that the only way to get an interrupt from the EDMA would be to use shadow region 1.  I'm not sure why it was hooked up this way, but assuming the document is correct then shadow region 1 is the only way to get an interrupt.

  • 0 in reply to Brad Griffis
    TI__Guru*** 125430 points

    FYI, they have shadow region 0 connected to the ARM and shadow region 1 connected to the DSP, so it's a pretty reasonable hookup they did.