OMAP 3530 GPMC clock phase shift

Hi

We are using OMAP3530 in one of our designs. 26MHz input clock is provided to OMAP and GPMC module is configured to give out 52MHz clock. We are observing random phase change between input clock to OMAP and GPMC clock. Since we are using the same input clock (26MHz) to FPGA glue logic which interfaces GPMC to another chip, we are having data corruption inside FPGA.  Please advice is there any way we can phase align GPMC clock from OMAP to input clock provided to OMAP

Thanks in advance

Aravind