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SPI NOR Boot Problem on 6678

Other Parts Discussed in Thread: TMS320C6678

Hi,

I am booting my custom board with TMS320C6678 from SPI NOR Flash. When I write 6KByte application into NOR flash, application works successfully but when I write 30KByte application into NOR, Boot Magic Address value is 0 and the application does not work. Is there any application size limit that RBL can copy from ROM into RAM?

Regards,

Cigdem 

  • Hi Cigdem,

    There is no limit size of the application image that can be booted by the boot ROM.If you have 6KB boot image booting from the SPI NOR, I don`t see why a 30KB application from the NOR flash. Does your SPI NOR writer confirm the writes by doing a read back. Can you run the debug file that is provided on the wiki here and provide the dump for us to analyze?

    http://processors.wiki.ti.com/index.php/Keystone_Device_Architecture

    Regards,

    Rahul

  • Hi Rahul,

    Thanks for your reply. As it was holiday at Turkey last week I could only find a chance to run the debug file this week.

    My SPI NOR writer confirms the writes and I also have dumped the SPI NOR flash data from serial port and have seen that it is correct.

    I have loaded the Shannon_SystemDebug_v0.4.gel and have run "C6678 Device Level Status -> C6678_Boot_Status" and "C6678 PLL Configuration -> C6678_Mainpll_Configuration" scripts. I am sending the results for both 6KB and 76KB boot images below:

    C6678 BOOT STATUS

    For 6KB image:

    C66xx_0: GEL Output:  BOOTPROGRESS[31:0] ---> 0xC4001500
    C66xx_0: GEL Output:  BOOTCFG_BOOTCOMPLETE ---> 0x00000001 
    C66xx_0: GEL Output:  C6678 Core 0 ---> Boot process Completed
    C66xx_0: GEL Output:  C6678 Core 1 ---> Boot in process. Not Complete
    C66xx_0: GEL Output:  C6678 Core 2 ---> Boot in process. Not Complete
    C66xx_0: GEL Output:  C6678 Core 3 ---> Boot in process. Not Complete
    C66xx_0: GEL Output:  C6678 Core 4 ---> Boot in process. Not Complete
    C66xx_0: GEL Output:  C6678 Core 5 ---> Boot in process. Not Complete
    C66xx_0: GEL Output:  C6678 Core 6 ---> Boot in process. Not Complete
    C66xx_0: GEL Output:  C6678 Core 7 ---> Boot in process. Not Complete

    For 76KB image:

    C66xx_0: GEL Output:  BOOTPROGRESS[31:0] ---> 0x44004780
    C66xx_0: GEL Output:  BOOTCFG_BOOTCOMPLETE ---> 0x00000000 
    C66xx_0: GEL Output:  C6678 Core 0 ---> Boot in process. Not Complete
    C66xx_0: GEL Output:  C6678 Core 1 ---> Boot in process. Not Complete
    C66xx_0: GEL Output:  C6678 Core 2 ---> Boot in process. Not Complete
    C66xx_0: GEL Output:  C6678 Core 3 ---> Boot in process. Not Complete
    C66xx_0: GEL Output:  C6678 Core 4 ---> Boot in process. Not Complete
    C66xx_0: GEL Output:  C6678 Core 5 ---> Boot in process. Not Complete
    C66xx_0: GEL Output:  C6678 Core 6 ---> Boot in process. Not Complete
    C66xx_0: GEL Output:  C6678 Core 7 ---> Boot in process. Not Complete

    C6678 MAIN PLL CONFIGURATION

    For both 6KB and 76KB images:

    C66xx_0: GEL Output:  BOOTCFG_MAINPLLCTL0 ---> 0xFF000000
    C66xx_0: GEL Output:  BOOTCFG_MAINPLLCTL1 ---> 0x0000004F 
    C66xx_0: GEL Output:  PLLD : 0
    C66xx_0: GEL Output:  PLLM[12:6] : 0
    C66xx_0: GEL Output:  BYPASS : 0
    C66xx_0: GEL Output:  BWADJ[7:0] : 255
    C66xx_0: GEL Output:  BWADJ[11:8] : 15

    Also when there is 76KB application in the SPI NOR and I connect to the core 0 with emulator, I observe that the code stuck at address 0x20B0A350 whereas when I make main PLL initilization with a gel file and reset and run the core 0 from CCS, the code works properly (Boot is completed and jumps into the correct address).

    Regards,

    Cigdem

     

     
  • Hi Rahul,

    I want to add some information, I think it can be useful for the solution.

    Today I have seen that the SPI NOR boot has not worked all the time when there is 6KB application in NOR flash. I have made 10 trial and it has worked for 8 times and has not worked 2 times. Also I rarely see that 76KB application works but as it is so rare that I have made 20 trial and it has not worked in any of the trials.

    I will be glad if you advise me on the problem.

    Regards,

    Cigdem

  • Hi Cigdem,

    What is the version of silicon you are using? PG 1.0 silicon has an errata regarding PLL initialization that might show up in ways that you have mentioned. Can you please confirm?

    If you are using PG2.0, Could you mention if your application requires code to be placed in DDR3?

    Regards,

    Rahul

  • Hi Rahul,

    I am using PG2.0 and my application code requires to be placed in MSMCSRAM. You can see it from my CCS project's cmd file that I am sending in the attachment.

    Regards,

    Cigdem

    bfw.zip
  • Cigdem,

    Your PC is hung in the ROM function where it is trying to perform a SPI transfer. Can you probe the SPI pins to see if there is any transfer detected on the Pins. Also please elaborate the difference between the 6KB boot file and the 60KB boot file and the steps followed to generate the image. If you are using utilities from MCSDK,have you changed the MAX size configured in those utilities to account for your increase image size.

    For Eg, If you are using the b2i2c utilities in the MCSDK, please look at the source for the B2i2c function in the MCSDK_INSTALL_DIR/tools/ibl/src/util folder. The default max size configured in the tool is 0x20000 .

    You can change the line 161 to be able to process your image.

    #define SIZE    0x20000

    Regards,

    Rahul

  • Hi Rahul,

    I have solved the problem, it is boot up time. Boot up time was 6 seconds for 6KB applicaiton whereas 2 minutes 15 seconds for 76KB application.

    "sw_pll_prediv", "sw_pll_mult" and "sw_pll_postdiv" values were 0 in my *.spi.map file which is used by romparse utility while converting *.out to *.bin. I have set sw_pll_prediv = 0, sw_pll_mult = 19 and sw_pll_postdiv = 1 to set device speed to 1Ghz for 100Hhz input clock and now 76KB application boots up immediately.

    Thanks for your help.

    Regards,

    Cigdem