We’ve been working on a TI 5590A DSP-based design. After 3-4 days of continuous operation in a small loop the DSP stops executing instructions. All clock signals at the DSP are correct:
- Signal Name: OSCI, Desc: Osc input (11MHz XTAL Connection), PIN-13
- Signal Name: OSCO, Desc: output (11MHz XTAL Connection), PIN-14
- Signal Name: CLK, Desc: 44MHz Clock out, PIN-15
But the READ and WRITE lines are HIGH and not changing:
- Signal Name: AREN , Desc: Read Enable Strobe, PIN-16
- Signal Name: AWEN, Desc: Write Enable Strobe, PIN-19
The DSP goes to a Cyclone II PLD (Schematic attached). The PLD allows a reduced drive current mode. If we set the PLD to the reduced mode, then the MTBF is greatly improved but the problem still exists. We looked a BUS timings, power supply, etc. and didn’t find anything which would explain this issue. Has anyone seen a similar situation and what would be the next steps to investigate or resolve this?
Thanks,
Rich...
