Hi,
We are using TI OMAP-L137 EVM board for one of our application. The Audio expansion slots in the EVM is used for interfacing the Processor to the Front End(FE) board. We are using McASP0 to interface OMAP prosessor to the ADC in the FE board. The ADC we are using is ADS1174 from TI, configured to transfer the 4 digitized input data via Frame sync protocol.
The McASP0 of OMAP is configured as master receive. We are supplying High frequency clock of 4.096MHz to the OMAP (AHCLKR0) and ADC(CLK) from the FE board. The McASP0 is configured to divide this clock internally and give out ACLKR0(512KHz) and AFSR0(8KHz) to the ADC.
With these configuration, we are able to receive some data from the ADC. The frame interrupt and slot ready interrupts are all happening. But we are not able to receive data from the ADC in proper order. We disabled all the interrupts and tried to read the RSLOT register, by polling the RSLOT register continuously to check whether all the slots are getting received in order. When we poll the RSLOT register, we are not getting the SLOTS in order. We are getting like slots 0, 0, 0, 2, 2, 3, 1, 1, 2, 3, 3 etc randomly. I.e. we are missing some slots randomly.
Have you come across such issues before?
Could you suggest what can cause such kind of issue?
Regards,
Arun