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Resume process of OMAP 3530

Hi,

    Does anyone have the experience about resume process of OMAP 3530? When system resume, I think boot rom should get a return point and jump to it to return previous status of OS. Where does this "return point" store? I am using CE.Net 6 BSP and I see the resume will return from a function inside SRAM but I don't find documents (TRM) to describe this. Eventhough I use CE but I think this is not only related to OS but also related to CPU as this should be the behavior of boot rom.

    My questions are :

1. Will boot rom get a return point for resume? Where does this "return point" store?

2. Will boot rom jump to a specific point inside SRAM during resume process?

Leo

  • Hello Leo,

    If you question pertains to power savings scheme and in particular resuming MCU execution after it has been turned OFF, then please look for spare area in the SYSCONTROL module where the return address is expected to be stored along with rest of the CPU context. This is typically an address in SRAM. CPU will branch to this address once it is powered back.

    IMHO, the TRM describes the chip features. It is up to the software implementation to decide the addresses.

    Perhaps a TI representative may correct me.

    Best regards,

    SS

  • I meant to say that the bootrom reads the context registers in the syscontrol. This is only done if the reason for previous MCU shutdown was PRCM based shutdown.

  • Hi,

       Thanks. I think you are right. There is a public restoration pointer in SCM. I think it should be the first point to return from bootrom. Bootrom should read the adress stored in SCM and jump to it. Next, function whose address stroed in SCM should jump to the other point and go back to previuos state of OS. This is my guessing and understanding. 

    Leo