Hi.
It seems that the EM_WE pin of AEMIF is pulldowned during the hardware reset.
In connecting a NAND flash, I think that it is necessary to set EM_WE at the time of the powerON to HI, but is there any problem?
Regards,
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Please correct me if I am wrong.
The WE* can not take effect by itself. Accessing NAND is quite complex, when boot up, CPU will send cmd to NAND and make the configurations. So you dont have to worry about that , even more, the situation you mentioned is during the reset.
Hi Eason.
EM_WE needs to be HI at the time of the power supply ON of NAND flash.
For the reason, we did the design which PullUp EM_WE in circuit.
However, It seems that EM_WE is PullDowned during hard reset in DM368 inside.
That is, EM_WE serves as middle potential during hard reset.
May not I pullUp, when connecting EM_WE to NAND flash?
Regards.
Hi Eason,
I am seeing the same phenomenon
EM_WE (pin J15) & EM_OE (pin J19), both pull-up to 3.3V through 10k resistor, are showing two different behaviours:
EM_WE will "stuck" at around 2.2V after 3.3V supply voltage is applied, when the RESET# pin is still asserted (Seems like the pin is pulled down internally with 20k impedance??). The EM_WE will only rise to 3.3V after the RESET# is released.
EM_OE will rise to 3.3V once 3.3V supply voltage is applied, regardless of whether RESET# pin is released or not.
Kindly advice if these is the characteristic of DM365/DM368 or have we done something wrong?
Regards