DSPLIB FFT/IFFT I/O Scaling

2 to the power of log base 2 of N.

FFT scaling is a bit  unclear in the most recent DSPLIB. On page 2-4 there's a very unclear (to me) explaination:

2.2.5 DSPLIB Overflow and Scaling Issues

The DSPLIB functions implement the same functionality of the reference C code. You must conform to the range requirements specified in the API function, and in addition, restrict the input range so that the outputs do not overflow. 

In FFT functions, twiddle factors are generated with a fixed scale factor; i.e., 32767(=215−1) for all 16-bit FFT functions, 1073741823(=230−1) for DSP_fft32x32s, 2147483647(=231−1) for all other 32-bit FFT functions. Because DSP_fft16x16r and DSP_fft32x32s perform scaling by 2 at each radix-4 stage, the input data must be scaled by 2(log2(nx)−cei[log4(nx)−1]) to completely prevent overflow. In all other FFT functions, the input data must be scaled by 2(log2(nx)) because no scaling is done by the functions

In an older DSPLIB doc a pretty good explaination is given: http://focus.ti.com.cn/cn/lit/an/spra885a/spra885a.pdf

Scaling by 2 (i.e., >>1) takes place at each radix-4 stage except the last one. A radix-4 stage could give a maximum bit-growth of 2 bits, which would require scaling by 4. To completely prevent overflow, the input data must be scaled by 2^(BT-BS), where BT (total number of bit growth) = log2(N) and BS (number of scales by the function) = ceil(log4(N)-1)).

In "sprueb8b.pdf" page 4-6 is stated:

All stages are radix-4 except the last one, which can be radix-2 or radix-4, depending on the size of the FFT. All stages except the last one scale by two the stage output data.

So, when I put these 2 together, if I use DSP_fft16x16()with N=16384 (2^14), then the number of stages used is 4LOG(2^14) = 7. The last stage does not scale, so the maximum amount of scaling that the FFT input requires is 2^(7-1) = 64.

I am using DSP_fft16x16() in the most recent DSPLIB (c64plus-dsplib_2_02_00_00). Can someone confirm that what I state above is correct? 

-Dirk

 Gagan Maur posted a Wiki link earlier which seems to confirm the above.

http://processors.wiki.ti.com/index.php?title=FFT_Implementation_With_No_Data_Scaling

The wiki states that the DSP_fft16x16  expands data by 2^(LOG4(N)-1) for cases where N is a power of 4:

The FFT (DSP_fft16x16) and iFFT (DSP_ifft16x16) implementation provided with the C64x+ DSPLIB apply scaling of data to avoid overflow. See below from the user’s guide.

All stages are radix-4 except the last one, which can be radix-2 or radix-4, depending on the size of the FFT. All stages except the last one scale by two the stage output data

It is desirable in certain use cases that the data scaling is not applied in the FFT routines. This article suggests modifications to the provided FFT source in the DSPLIB such that the data is not scaled. Also, an example is provided to demonstrate the affect of suggested change.

I think that answers my question. Please correct me if I am misinterpreting something.

It would be great if the DSPLIB datasheet could be updated and maybe have some example data in regards to the various options like scaling. It's just a suggestion, but it would make my work a lot easier (I'm not a math expert....).

I found some other issues in the SPRUEB8B manual:

The index (glossary) mentions some dead links:

- DSP_bitrev_cplx 4-90

- DSP_r4fft 4-95

- DSP_radix2 4-93

- DSP_fft 4-98

The last page in chapter 4 is 4-87… These seem to be leftovers from the pre-C64x+ era.

-Dirk