Dear all,
I already saw several posts on GPMC bus and FPGA, but I need "overconfidence ".
I have some data produced in the FPGA and I want to send them to the ARM335x.
In particular, I will put my data in a FIFO (with the write clock set by my FPGA) and I'll use the GPMC bus to read them. My feeling is that the "GPMC to 16-Bit Non-multiplexed Memory" is the best approach.
The "read side" of the FIFO needs a "read enable" signal and a "read clock" signal.
It looks to me that I do not need most of the signals of the GPMC bus (I have only to take care of the FPGA side: I do not care about how to set all signals on the ARM side). For example, the signals related to the addressing (nADV and also the address value) could be neglected because the read side of the FIFO do not require an address. I only need the "nOE" signal to enable a "read_enable" in the FIFO with the right timing ( I know, too many enable in the same sentence). In principle, it means that I could also leave those pins un-connected (even if it is better to have them accessible: you never can tell...).
Is that right?
Thanks a lot.
Alberto
