We have tested this following little problem under U-Boot and also with Linux application. We are verifying this using logic analyzer hooked up to the GPMC data pins and the nCS pins and WE pins.
We cannot seem to perform consecutive WRITE action to GPMC under certain circumstances, if we do it too "fast" (and by fast, it just means something like greater than 2MHz).
These are some of the test cases:
1) Consecutive write to same address fails. Only the last write actually happens. If we can slow it down (e.g. printf or getchar or something similar), then all writes actually happen. It doesn't matter if writes contain different data or same data. In fact, I had this test case where I wrote some data to the same location 10000 times, then wrote some other data. The 10000 times write NEVER ever took place, not even once.
2) 3 consecutive writes to different address fails. 4 consecutive writes causes ALL 4 to happen. ??? I would've thought if this were a timing issue, then 4 writes might cause the last one to take effect. Or if it were a cache issue, the the last one happens regardless how many I do. (The actual test is something like this: [assuming write(<address>,<data>)]:
write(0xA, 0x1234); write(0xB, 0x1234); write(0xC, 0x1234); write(0xA, 0x5678); write(0xB, 0x5678); write(0xC, 0x5678); write(0xA, 0xABCD); write(0xB, 0xABCD); write(0xC, 0xABCD); write(0xA, 0xCAFE); write(0xB, 0xCAFE); write(0xC, 0xCAFE); // Only this set of writes happens.
However, if I repeat this just once more (e.g. write(0xD,<data>) for each data, then all 16 of the writes happen.
3) Same as case 2, but I write different data to different address, i.e.:
write(0xA, 0x1234); write(0xB, 0x5678); write(0xC, 0xABCD); write(0xA, 0x1234); write(0xB, 0x5678); write(0xC, 0xABCD); write(0xA, 0x1234); write(0xB, 0x5678); write(0xC, 0xABCD); write(0xA, 0x1234); write(0xB, 0x5678); write(0xC, 0xABCD);
In this case 3), actually ALL of the writes occur, all 12 of 'em.
On the logic analyzer & scope, we can see the data never makes it out to the GPMC data pins, and furthermore, I can see that the GPMC_nCSx pins and GPMC_WE pins never get activated.
(You might ask why we would want to write like this. We have a peripheral on the end of this which is not really a memory device, so we only have to deliver data from OMAP on a regular basis, the actual address doesn't matter so much. But we do need to shuffle data back & forth quickly, so we cannot afford to have it sleep between writes to make it work).
So any clues what might be going on here? We ran a bunch more tests, but the only "rules" we seem to have come up with are 1) Don't do it too fast and/or 2) Always write to different address with different data (not possible, address we can control, data we cannot).
