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EMUn as GPIO on AM335x

radar
Expert 3550 points


Champs,

I am literally posting this direct from my customer as i couldn't find anything on the forums yet; and it looks right to me.  I'm trying to dig up a beagle-bone now to officially replicate, but I'll probably be successful so in preparation for that eventuality I thought I'd get this out there to see if anyone has done this.  We're basically jiust trying to use the EMU pins as GPIOs, as follows: but I can’t figure out what is correct way to initialize the pinmum utility.

 
In board-am335xevm.c I did this:
 
/* pinmux for captouch device */
static struct pinmux_config gpio_captouch_mux[] = {
    {"emu1.gpio3_8", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT},
    {"emu0.gpio3_7", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
    {NULL, 0},
};
 
But when I boot Linux complains:
 
[    0.990844] _omap_mux_get_by_name: Could not find signal emu1.gpio3_8
[    0.997192] _omap_mux_get_by_name: Could not find signal emu0.gpio3_7
 
I also tried
 
/* pinmux for captouch device */
static struct pinmux_config gpio_captouch_mux[] = {
    {"gpio3_8", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT},
    {"gpio3_7", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
    {NULL, 0},
};
 
But I got
 
[    0.990844] _omap_mux_get_by_name: Could not find signal gpio3_8
[    0.997192] _omap_mux_get_by_name: Could not find signal gpio3_7

Looking through omap_get_by_name() it should find mux either by full name or mux mode.  Do you know what is trick to set these pins as GPIOs?
 
 Any ideas?  gpio3_8 seems like the right name to me...
 

  • 0
    TI__Mastermind 25235 points

    Hi,

    Which version of the SDK/PSP are you using?

    Please check the <linux_dir>/arch/arm/mach-omap2/mux33xx.c file for the AM33XX pin mux super set:

    /* AM33XX pin mux super set */
    static struct omap_mux am33xx_muxmodes[] = {

    ...

    };

    Check if these entries are present:

        _AM33XX_MUXENTRY(EMU0, 0,
            "emu0", NULL, NULL, NULL,
            NULL, NULL, NULL, "gpio3_7"),
        _AM33XX_MUXENTRY(EMU1, 0,
            "emu1", NULL, NULL, NULL,
            NULL, NULL, NULL, "gpio3_8"),

    They are present in the latest SDK version 06.00.00.00.

    I just tried including your pinmux config inside the am335x board file and compiled the kernel successfully.

    Best regards,
    Miroslav

  • 0 in reply to Miroslav Kiradzhiyski XID
    TI__Expert 3550 points

    Well, I can check with the customer, but I doubt this is the issue; the problem wasn't compiling- the error I elaborated on is a run-time error when Linux boots.  So I am pretty sure the compilation worked just fine even if they weren't using 6.00.00.00.  But I will check...

  • 0 in reply to radar
    TI__Mastermind 25235 points

    Hi,

    I just checked the muxing from the debug fs and everything is working fine. No errors during kernel start-up either.

    root@am335x-evm:~# cd /sys/kernel/debug/omap_mux/
    root@am335x-evm:/sys/kernel/debug/omap_mux# cat emu0
    name: emu0.gpio3_7 (0x44e109e4/0x9e4 = 0x002f), b NA, t NA
    mode: OMAP_MUX_MODE7 | AM33XX_PIN_INPUT
    signals: emu0 | NA | NA | NA | NA | NA | NA | gpio3_7
    root@am335x-evm:/sys/kernel/debug/omap_mux# cat emu1
    name: emu1.gpio3_8 (0x44e109e8/0x9e8 = 0x0007), b NA, t NA
    mode: OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT
    signals: emu1 | NA | NA | NA | NA | NA | NA | gpio3_8

    I'm running the kernel from the SDK sources (version 06.00.00.00) plus added gpio_captouch_init() function initializing these two pins as GPIOs using your pinmux_config, inside the board-am335xevm.c board config file.

    Best regards,
    Miroslav

  • 0 in reply to Miroslav Kiradzhiyski XID
    TI__Mastermind 25966 points

    Just FYI, please see some boot up ramifications here:

    https://e2e.ti.com/support/arm/sitara_arm/int_sitara_am335x/f/425/p/262633/922187.aspx#922187

    I'm always nervous about EMU0/1 pin mux on Sitara.

     

  • 0 in reply to Joe G.
    TI__Expert 3550 points

    Thanks- we got the pins config's correct;y now; and our problem has moved to a single vs multi-touch display issue (we were using EMU0/1 as the interrupts).  That said, I believe that issue is addressed in http://e2e.ti.com/support/arm/sitara_arm/f/791/p/255787/898170.aspx#898170 so I think we can close this one out.  Thanks!