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mux33xx.c doesn't match am335x pinout?

Matt Brandt
Prodigy 50 points

It looks to me like a lot of the pins in mux33xx.c don't really match the am335x processor. Am I looking at the correct file? Is there a file with a more accurate set of pin descriptions for the am335x? Is there a reason that some of the pin mux options aren't included in this file? For instance, GPIO27 looks like it should be:

GPMC_AD11/LCD_DATA20/MMC1_DAT3/MMC2_DAT7/EHRPWM2_SYNCI_O/PR1_MII0_TXD3//GPIO0_27 

but the file has it as:

_AM33XX_MUXENTRY(GPMC_A11, 0,
"gpmc_a11", "mii2_rxd0", "rgmii2_rd0", "rmii2_rxd0",
NULL, NULL, "mcasp0_axr1", "gpio1_27"),

What am I missing here?

  • 0
    TI__Mastermind 25235 points

    Hi,

    You are looking at two different pins: GPMC_A11 and GPMC_AD11.

    The pinmux definitions inside mux33xx.c are absolutely correct. The corresponding GPIO signals are gpio1_27 and gpio0_27. These are different.

    Please check the am335x datasheet: pages 25 and 27.

    Best regards,
    Miroslav

  • 0 in reply to Miroslav Kiradzhiyski XID
    Prodigy 50 points

    Sorry, bad example. In looking through the pin mux definitions it seems like it is mostly the LCD signals that are incorrect in the C file, but there are quite a few missing signals. For instance AD12 is described:

    _AM33XX_MUXENTRY(GPMC_AD12, 0,
    "gpmc_ad12", "lcd_data20", "mmc1_dat4", "mmc2_dat0",
    NULL, NULL, NULL, "gpio1_12"),

    but should be lcd_data19 and the 5th entry is listed in the data book as eQEP2A_in.  Likewise, AD11 also has the wrong LCD pin and is missing ehrpwm_synco in the 5th slot. GPMC_A11 should have an alternate gpmc_a27 in the 5th slot.

    Is there a reason these signals are left out? Maybe they lead to timing conflicts or something similar? Or are they just signals specific to the 3352 that aren't present on other 33xx processors?