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Question about C6670 SPI Boot

g.f.
Guru 15520 points

Hi,

I have questions about C6670 SPI Boot.

In our customer board, SPI NOR Flash Boot are used and the application only use L2RAM.

We don't use IBL so that it boots directly from NOR Flash.
But it looks like that boot is failing.
When I check the Program Counter from CCS after boot, it was stopping at 0x20B09A54.
This is Boot ROM area, so I guess the RBL is failing.

From CCS memory browser, DEVSTAT register was set to "0x0000140D"(SPI Boot mode) 
and the BOOTCOMPLETE register was "all zero".

It seems that RBL reads only 80byte from NOR Flash.
What kind of thing is considered as a factor?

best regards,
g.f.

  • 0
    TI__Guru** 116840 points

    G.f,

    What region of L2 are you trying to load the code? Have you tried to place the code in MSMC and see if the boot completes? Have you verified the SPI writes to the NOR flash by reading back the data.

    Can you probe the SPI data lines and check if you see data on the lines when the clock is provided?

    Are you using the default SPI parameter table to boot the device?

    Regards,

    Rahul

  • 0 in reply to Rahul Prabhu
    Guru 15520 points

    Hi Rahul,

    Thank you for the reply.

    Right now, the boot is working fine.
    The bit for Core0 in BOOTCOMPLETE register is set to "one"
    and the application is executing fine.

    The problem was SPI parameter table.
    We first refered to SPI parameter table which was attached to the following E2E:
    http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/p/288354/1012614.aspx#1012614
    We set each parameter as follow and
    used Boot Parameter Table Common Parameter with the default value,
    but it didn't worked.
    //////////////////////////////
    section {
     boot_mode = 50
     param_index = 0
     options = 1
     core_freq_mhz = 1000
     exe_file = "spiboot.i2c.ccs"
     next_dev_addr_ext = 0x0
     sw_pll_prediv = 5
     sw_pll_mult = 32
     sw_pll_postdiv = 2
     sw_pll_flags = 1
     addr_width = 24
     n_pins = 4
     csel = 0
     mode = 0
     c2t_delay = 0
     bus_freq_mhz = 0
     bus_freq_khz = 500
    }
    ///////////////////////////////

    So, we change the parameter of nysh.spi.map as follow:
    ////////////////////////////////////
    section {
     boot_mode = 50
     param_index = 0
     options = 1
     core_freq_mhz = 100 (modified)
     exe_file = "spiboot.i2c.ccs"
     next_dev_addr_ext = 0x0
     sw_pll_prediv = 5
     sw_pll_mult = 32
     sw_pll_postdiv = 2
     sw_pll_flags = 1
     addr_width = 24
     n_pins = 5 (modified)
     csel = 2 (modified)
     mode = 1 (modified)
     c2t_delay = 0
     bus_freq_mhz = 0
     bus_freq_khz = 500
    }
    ////////////////////////////////////

    And also after .dat file was generated using format utility
    we changed the Common Parameter as follow:
    the length parameter to 0x0028,
    the Boot Mode to 0x0032,
    the Port Num to 0x0000,
    the PLL MSW to 0x0000,
    the PLL LSW to 0x0000.
    It boot the device  finally.

    By the way, what is the default SPI boot parameter for C6670
    and where we could find them? Do we need to use default parameters?
    We still don't know which parameter setting caused the boot failing.

    The boot is working fine but now we are facing to DDR3 initializing problem.
    I posted to the following E2E. Can you please give me an advise for this?
    http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/t/300981.aspx

    best regards,
    g.f.