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Interfacing a 240x320 pixel LCD in RGB16

Other Parts Discussed in Thread: DA8XX

On a custom board i have a 240x320 pixel LCD module from Crystalfontz (CFAF240320A-032T). This module is equipped with a OTM3225A controller (should be compatible with the ILI9325 controller) that drives the panel.

I use SPI to initialize the module and set the configuration registers. This seems to work fine as I can write a test pattern via SPI and it shows up correctly. However the only purpose of the SPI interface (in my case) is to configure the module, not to transfer data to be displayed.

For this I use the RGB interface of the module (16bit mode). In 'da8xx-fb.c' I have added the following panel configuration to 'struct da8xx_panel':

    /* Crystalfontz CFAF240320A-032T */
    [4] = {
        .name = "CFAF240320A-032T",
        .width = 240,
        .height = 320,
        .hfp = 6,
        .hbp = 6,
        .hsw = 1,
        .vfp = 6,
        .vbp = 6,
        .vsw = 1,
        .pxl_clk = 5000000,
        .invert_pxl_clk = 0,
    },

After some more modifications (pinmux, call to 'am33xx_register_lcdc', etc) in ' board-am335xevm.c' I can see (using 'fbset')  that the frame buffer device has been configured according to my modifications.

The problem is that I don't get the entire frame buffer to show up on the display. It seems that only parts of the frame buffer are displayed. I can change the timing parameters using 'fbset' and I see that things are changing but I do not manage to show the entire 240x320 frame buffer on the display. I believe there are some timing settings (front porch, back porch, etc.) on the driver chip that need to be changed, but I don't know how.

Has anybody else used CFAF240320A-032T module in RGB16 mode or the OTM3225A controller with the AM335x ? Where could I find additional information to get this working?

Many thanks and kind regards, Felix

  • Hi Felix,
     
    Could you post a picture of what is being displayed on your panel?
  • Hi again,
     
    From reading the CFAF240320A-032T and OTM3225A datasheets it seems to me that this display only supports the Intel 8080 format. I'm referring to the IM[3:1]/IM0 valid settings on page 8 of the OTM3225A datasheet. This is confirmed by the timing diagram on page 9 of the CFAF240320A-032T datasheet. The AM335X LCD controller will need to be set in LIDD mode to support this interface. It's referred to as Micro-Interface Graphic Display Intel (or 8080) mode in the AM335X datasheet and TRM.
  • Hello Biser,

    Thanks for your replay.

    The OTM3225A has two interfaces, the one you are talking about is the so called "system interface" that is used for configuration and, if wanted, can be used to pass display information. This interface is chosen by setting IM[3:0] as you said. As stated in my first post, I use the 'system interface' in SPI mode to write to the configuration registers.

    The second interface, the one I use in RGB16 mode is used to transfer data. It consists mainly of DB[17:13], DB[11:1], VSYNC, HSYNC, ENABLE and DOTCLOCK.

    The interface used to pass data to the OTM3225 RAM to be display is set by switching the RM bit in configuration register R0Ch. If set to 0, display data is passed by the "system interface", if set to 1, display data is passed by the RGB interface.

  • You are right, I didn't check that far. Can you still post a photo of what the display looks like?
  • For now I just fill the frame buffer with white (0xffff) pixels. I am just trying to get all 240x320 pixels displayed.

    I have attached a 'screenshot'. The few lines displayed at the bottom are all I see after filling the entire frame buffer with white pixels. The lines do not start at the first line at the bottom.

    Any idea?

  • I suppose you follow the sequence required (page 65 in the OTM3225A datasheet)?
  • Yes I do that using the following code:

        OTM3225WriteReg(fd, 0x0003, 0x00A0);
        OTM3225WriteReg(fd, 0x0020, 0x0000);    // GRAM horizontal address set (R20h), 1st line
        OTM3225WriteReg(fd, 0x0021, 0x0000);    // GRAM vertical address set (R21h), 1st line
        OTM3225WriteReg(fd, 0x000C, 0x0111);    // switch to RGB mode
        OTM3225WriteIndex(fd, 0x0022);
        usleep(500000);

    Where 'fd' is the SPI file descriptor, and 'OTM3225WriteReg' performs a write to the index register followed by the write to of the data.

    I have attached a second image. This is what I did to create it:

    1. I use SPI to set every pixel in the display RAM to red (resulting in entirely red screen of course).
    2. I switch to RGB mode which maps the frame buffer to the display RAM (black area at the bottom, instead of  full screen)
    3. I used a test program to write 76800 pixels of white (16 bits per pixel) to the frame buffer

    It really looks as if only a very small part of the frame buffer gets displayed on the panel. I really feel I have a problem with setting up the timing correctly. What am I missing here?

    kind regards, Felix

  • Felix,
     
    I can't say what's going on. Could it be that the RGB interface is running before you switch the display to RGB mode? It somehow seems that frame/line synchroniztion is not achieved.
  • Hello Briser,

    Indeed the RGB interface (in the SOC) is running before the display gets configured by SPI. This is just temporary until things are working. Shouldn't the synchronization pick up by itself once the LCD module is configured correctly?

    This one is really driving me crazy. Changing the timing parameters with 'fbset' I can make the white pixel area (my frame buffer content) move up and down and get larger and smaller on the display, but I have clue to what I should set these parameters, if the ones I believe are correct don't work.