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Second TSIP channel issues c6678

Gentlemen,

I am trying to modify pdk_C6678_1_1_2_6\packages\ti\drv\tsip\test software in order to use both TSIP peripherals.

To do that I haven changed #define NUM_USED_TSIP_PORTS 1 to #define NUM_USED_TSIP_PORTS 2 in test.h and this is the ONLY thing I have changed.

I can see that both peripherals are being enabled/configured, the timeslots seems properly mapped, etc.

The last lines in the CCS log are:

TSIP Port 1 configured

-----------------------
TSIP data transfer...

It sounds like the event triggering data verification is never thrown and this is a hardware interrupt. It is a bit weird as the test is using data loopback test mode.

Have TI (or someone else) succeeded using this software to test two TSIP peripherals? Any pointers I can look?

Best Regards,

Arnaud

  • Arnaud,

    Are you testing with C6678 EVM? And is the example with single TSIP port configuration working for your please?

    We are checking with LLD team and will get back to you later. Thanks.

  • Dear Steven,

    Actually yes EVM6678 and our FMC667 also. I found the problem, it is about enabling the setup debug output. In test.c is 'Int printSetupProgress=0;' changing that to 'Int printSetupProgress=1;' when 'NUM_USED_TSIP_PORTS' in test.h is set to 2 causes the problem.

    As soon the setup progress is not printed out, the loopback works as a charm on both peripherals!

    Best Regards,

    Arnaud