AM335X Watchdog Reset

Hi,

AM335x ARM® Cortex™-A8 Microprocessors (MPUs)
Technical Reference Manual

Literature Number: SPRUH73G
October 2011–Revised November 2012

hi Biser,

    Thanks a lot for your reply.The nRESETIN_OUT pin is connected with an external pull-up resistor and a Reset button.The Reset button is OK.

hi biser,

   yes.we test the watchdog in wince system and enable the watchdog when OS start.when the OS is ready,we stop to refresh the watchdog,and then the OS will go to reboot.however,the nRESETIN_OUT pin has always been high during the reboot period.we need this low pulse signal to reset other chips.

Hi,Biser,

     I think the wince os system has little to do with this issue.I only expect to the nRESETIN_OUT can output the low pulse when watchdog Reset start.

   does the nRESETIN_OUT output the low pulse under normal conditions when watchdog reset?

    do you have any suggestion about it without regard for the wince OS?

hi,biser,

    yes.I try to adjust the  RTTTIME1  value from 0 to 0xFF,but it has no effect on the result.this pin is always high.

Xing,

is it possible for you to disconnect the pin from the rest of the circuitry, except the external pullup? And then measure when the watchdog occurs? It should assert with RSTTIME1 duration.

Regards,

--Gunter

The WARMRSTn terminal should also be driven low when the PWRONRSTn is active.  Can you confirm this happens when you apply power?

Regards,
Paul

hi biser,

      The pull-up resistor is 10kΩ.As I described before,this pin is also connect to the reset button.the reset button works well.The circuit is similar to Figure 8-20. External System Reset of spruh73i.pdf.

hi peaves,

    The WARMRSRn and PWRONRSTn are always high when watchdog reset occurs.

hi Gunter,

    It's difficult for me to rework the PCB.The external reset button can work well.I think it can confirm that  the circuit is correct.

  Should I configure any other register except the RSTTIME1?

The PWRONRSTn input terminal is the main reset for the entire device.  When the PWRONRSTn terminal is driven low by your power-on reset circuit during power-up, the WARMRSTn output should also be driven low.

So I'm asking you to verify this works as expected by holding the PWRONRSTn signal low and checking to see if WARMRSTn is low. 

If this woks as expected, then the watchdog timer should also be able to drive the WARMRSTn output low the same way as PWRONRSTn drives it low.

Regards,
Paul

My previous post may been confusing, so I'm going to modify it as below.

The PWRONRSTn input terminal is the main reset for the entire device.  When the PWRONRSTn terminal is driven low by your power-on reset circuit during power-up, the AM335x device will drive the WARMRSTn terminal low.

I'm asking you to verify if this is working as expected by holding the PWRONRSTn terminal low and checking to see if AM335x drives the WARMRSTn terminal low. 

If this woks as expected, then the watchdog timer should also be able to drive the WARMRSTn output low the same way as PWRONRSTn drives it low.

Regards,
Paul

The PWRONRSTn Pin is used as reset signal for  other chips.this signal is always high when our device power on ready.

 if  this test is necessary,I need to ask hw engineer to verify it.

hi Paul,

    HW engineer has tested it.the WARMRSTn will be drived to low when the PWRONRSTn is low.

hi ti team,

       does warm reset sources need to be configured?

No, the watchdog does not need to be configured as a warm reset source.

I just realized your previous post mentions you are using WARMRSTn to reset external devices and you also have a push button reset switch attached to this signal.  There is a caution statement in the TRM about using the WARMRSTn this way.

Caution must be used when implementing the nRESETIN_OUT as an bi-directional reset signal. Because of the short maximum time allowed using RSTTIME1, it does not supply an adequate debounce time for an external push button circuit. The processor could potentially start running while external components are still in reset. It is recommended that this signal be used as input only (do not connect to other devices as a reset) to implement a push button reset circuit to the AM335x, or an output only to be able to reset other devices after an AM335x reset completes.

What else is connected to the WARMRSTn signal other than the switch you mentioned in your previous post?

Do you have a capacitor connected to this signal?  If so, this capacitor may not discharge in the very short time WARMRSTn is driven low.  If you look very carefully at the oscilloscope trace when the watchdog timer expires, you may see the WARMRSTn signal drop a few millivolts as it attempts to discharge any capacitance connected to the signal.  Try removing the capacitor to see if this allows the signal to go low when the watchdog timer expires.

Note: As mentioned above, without the capacitor you should not use the push button reset switch since it may bounce longer than the duration of the WARMRSTn pulse.

Regards,
Paul

hi Paul,

   thanks a lot for your reply!when I removed all the capacitors connected to this pin,the issue can also occurs.

I do not understand your comment "the issue can also occurs".

Are you saying the watchdog timer is now generating a warm reset as expected?  Does it work now?

Regards,
Paul

hi Paul,

    no.I don't see the low pulse waveform via oscilloscope when the watchdog timer reset.All of the capacitors connected to the WARMRESETn Pin have been removed.

hi,

   This issue is much urgent for us.

   For software only ,do we need to configure other registers except RSTTIME1?