Trouble running edma3 LLD example on OMAP3530 EVM

KevinMalone said:

Hi!  Anybody had any success getting the EDMA3 LLD 01.06 example (https://www-a.ti.com/downloads/sds_support/targetcontent/psp/edma3_lld/index.html) running on an OMAP3530 EVM?  I'm using CCS 3.3 and BIOS 5.33.03.  To preserve the original install, I did copy the project and src files to a new directly before building.  The example compiles and loads fine.  It even runs to main().  However, I seem to get stuck somewhere in the BIOS startup,  apparently with something to do with CLK (perhaps CLK_startup?).  Thus, I don't even make it into the echo task.   I'm using the pjt and tcf files for the OMAP3530 EVM from the example.   I even tried moving the BIOS data and code sections from DDR to IRAM (note that there appears to be an error in the length of IRAM) but had no success.  I'm no BIOS expert and new to the OMAP.  Any ideas?

You will need to enable the GPTimer that is being configured by the DSP/BIOS configuration to use as the time base for the DSP/BIOS CLK manager.  I suspect the Cortex-A8 has not enabled this GPTimer and therefore you will be stuck in the CLK_startup initialization function.

I believe there are a couple of choices for which GPTimer is used.  Assuming GPTimer5 is used, you will need to perform the following by the Cortex-A8 (either through GEL files for initial development or long term, by real code running on the ARM).

CM_FCLKEN_PER (0x48005000) : Set bit 6 for EN_GPT5.  This enables the functional clock to the GPTimer5.
CM_ICLKEN_PER (0x48005010)  : Set bit 6 for EN_GPT5.  This enables the interface clock (L4 bus interface) to the GPTimer5.

EDIT : The GPTimer5, by default, will have the 32KHz clock as the reference clock.  This is specified by CM_CLKSEL_PER (0x48005040).  You can change this to SYS_CLK by setting bit 3 CLKSEL_GPT5.

Hi everyone,

I am facing the same problem.

what I did was to add this function in  ARM's BSquare_Omap35xx_CortexA8.gel  and run this function.

hotmenu EnableGPT5()
{
   #define CM_FCLKEN_PER    *(int *)0x48005000
   #define CM_ICLKEN_PER     *(int *)0x48005010
  
   PRM_CLKSEL_REG = PRM_CLKSEL_REG|0x00000020;
   CM_ICLKEN_PER = CM_ICLKEN_PER|0x00000020;
    GEL_TextOut("GPT5 Enabled.\n");
}

But I still did not get my EDMA working, it seems the DMA got stuck in the while loop to wait for the transfer to finished.

can anybody provide me some suggestions?

Thanks a lot!

Hi Kevin

Can you please tell me how you make the EDMA3 LLD example work?

I am having the same problem as you, but even if I have enabled GPT5 as Brandon suggested, I still can not make the example work, the program jsut stoped at the while loop as shown below:

  /* Wait for the Completion ISR. */
            while (irqRaised1 == 0u)
                {
                /** Wait for the Completion ISR on Master Channel.
                 * You can insert your code here to do something
                 * meaningful.
     */
                }

Thanks for your attention!

wpl,

I don't recall any other changes to the example EDMA code (however, it has been a while since I looked at it).  My original posting really involved getting the echo() task to run.  Yours appears to be a different problem.

I'm no expert but your posting raises two questions:

1.  Isn't GP5 associated with bit 6 in CM_ICLKEN_PER?  If so, shouldn't you use 0x40 instead of 0x20 in your gel function EnableGPT5()?

2.  The example code runs various EDMA transfer examples(link, ping/pong, etc).  Do any these examples work?

Kevin, thanks for your reply!

you are right there were errors in my codes, I did modify the codes yesterday and have solved the GP5 problem.

Now when I run the "edma3_driver example" coming with edma3_lld_01_06_00_01, I was able to enter the echo task.

the problem is that my program got stuck in the first test edma3_test(512u, 32u, 8u, EDMA3_DRV_SYNC_A), actually the program got stuck in the while loop that waits for the DMA TRANSFER completion:

   /* Wait for the Completion ISR. */
            while (irqRaised1 == 0u)
                {
                /** Wait for the Completion ISR on Master Channel.
                 * You can insert your code here to do something
                 * meaningful.
     */
                }

it's really frustrating cause I just want to run a very simple example to test the EDMA.

I am using CCS3.3, (version 3.3.82.10), dsp/bios 5.33.03 and edma3_lld_01_06_00_01, C6000 code eneration tool v6.1.8.

I just onened the pjt file under folder "edma3_lld_01_06_00_01\examples\edma3_driver\evm3530"

built the project and load the program.

I also modified the mem configuration because the original DSP/BIOS mem setup for oamp evm35x platform use address like 0x10f10000 while my mistral EVM35X board used 0x00f10000.

so that's it, and I really dont know what change I need to make to make the example work. I assume these examples should be supposet to run out of box?

Thank you for your time, your advised are greatly appreciated!

wpl said:

I also modified the mem configuration because the original DSP/BIOS mem setup for oamp evm35x platform use address like 0x10f10000 while my mistral EVM35X board used 0x00f10000.

 

Make sure you use the 0x10f10000 address and not the 0x00f10000 address as I mentioned in this other post a moment ago.  (I thought it was worth mentioning again since others seem to be having some issues too.)