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Stand-alone 5535 Operation Peripheral Requirements

Hirsch Singhal
Prodigy 50 points
Other Parts Discussed in Thread: TLV320AIC3204

Hello all,

I am working on a device that performs different DSP transforms as my senior project.  My group selected the 5535 to use as our processor, but have found ourselves somewhat in over our heads.  We are using the device for a small subset of its features, but are struggling with the peripherals required.  As such, we were hoping more experienced members of the community could lend us some advice on what we may be missing or overlooking from a hardware standpoint.

Programming - we are not entirely sure how to do this.  Over USB, like the ezDSP? After reading the datasheet a few times I've found no mention of how to do so.

Boot sequence - Again, something we are woefully unsure of.  The group believes we can just wait until adequate power levels are reached, and the rest is done in software in conjunction with hardware pullups/pulldowns.  Is that correct?  Are there other hardware requirements to deal with timing?

Audio IO - We had been under the impression that the 5535 could do audio output on its own, but that appears to have been a misunderstanding of I2S.  We plan to sample audio through the SAR ADC, but are lost on how to generate output.  Do we need a codec on the board as well, similar to the ezDSP setup that we communicate with over I2S?

Apologies for the many open-ended questions, I'm afraid we went into this project assuming things wold be easier than they turned out.  If any more detail is needed regarding our plans, I'm happy to provide what little planning is complete so far.  

Thanks in advance,

Hirsch

  • 0
    TI__Mastermind 23785 points

    Thank you for choosing the C5535. Let's try answering your questions. First on programming, if I understand correctly, you just want to download code to run on DSP, then it depends on the HW platform, eg C5535 ezDSP, then the easiest is using the on-board XDS100 J2 USB. Next on boot, the device starts the boot sequence after RESET is de-asserted to check for valid boot image by checking peripherals in its defined order. Refer to the Boot Sequence section in datasheet and the Bootloader Apps Note which explains how to create & program boot image. As for audio IO, check out this site: http://processors.wiki.ti.com/index.php/C5000_Connected_Audio_Framework

    Hope this get you started.

  • 0 in reply to Steve Tsang
    Prodigy 50 points

    Thanks Steve.

    We're developing our own hardware platform, so we need some way of getting code onto the chip.  USB is attractive from a sourcing and familiarity standpoint - is there any documentation available that describes what kind of hardware we would require? 

    Re: C5000 Audio Framework

    We're not using USB for audio transmission (we're not hooking this up to a computer ever), so I don't think the framework is useful to us.  Again, we're developing our own hardware platform, so things that apply to the ezDSP don't work for us.

  • 0 in reply to Hirsch Singhal
    Prodigy 50 points

    Update:

    We're likely going with SPI EEPROM or microSD because the USB-UART chip on the ezDSP is out of our price range.  We're using the AIC3204 codec for analog conversion.  

    Question regarding the 3204 clock - is it possible to drive MCLK off of the PLL if BCLK and WCLK are provided by the 5535? Eliminating the 12MHz components would save time, money, and space.  I'm just not sure what WCLK and BCLK are when they're coming from the 5535 (and ths don't know what PLL_CLKIN would be).

  • 0 in reply to Hirsch Singhal
    TI__Mastermind 23785 points

    If you are using I2S interfaces to AIC3204, you can use I2S_CLK & I2S_FS to drive BCLK & WCLK.

    Regards.

  • 0 in reply to Steve Tsang
    Prodigy 50 points

    I should have been more specific. Given that we're driving BCLK and WCLK with the correct pins, what is the clock speed of each input. I do not know how fast I2S_FS or CLK run. 

  • 0 in reply to Hirsch Singhal
    TI__Mastermind 23785 points

     I2S_CLK maximum is 25MHz in the C5535 datasheet @ DVDDIO 3.3V, 2.75V & 2.5V. 20MHz @ DVDDIO 1.8V.

    I2S_FS equals I2S_CLK divided by some power of 2, typically 16 - for a max I2S_FS of 1.5625 MHz, assuming 16 for example.

    Regards.

  • 0 in reply to Steve Tsang
    Prodigy 50 points

    Thank you.  And to reiterate - can MCLK be generated from the PLL (internally, as opposed to externally), or is the PLL reserved for DAC/ADC usage only? If MCLK must be supplied, is there a way to generate that clock using the 5535 rather than procuring a dedicated 12MHz chip? 

  • 0 in reply to Hirsch Singhal
    TI__Guru 64480 points

    Hirsch Singhal said:

    And to reiterate - can MCLK be generated from the PLL (internally, as opposed to externally), or is the PLL reserved for DAC/ADC usage only?

    This seems to be more related to the AIC3204 specifically.  Page 2 of the AIC3204 datasheet indicates what the inputs and outputs of the PLL can be.  Below is a caption.

    The required internal clock of the TLV320AIC3204 can be derived from multiple sources, including the MCLK pin, the BCLK pin, the GPIO pin or the output of the internal PLL, where the input to the PLL again can be derived from the MCLK pin, the BCLK or GPIO pins.  Although using the PLL ensures the availability of a suitable clock signal, PLL use is not recommended for the lowest power settings.  The PLL is highly programmable and can accept available input clocks in the range of
    512kHz to 50MHz.

    Hirsch Singhal said:

    If MCLK must be supplied, is there a way to generate that clock using the 5535 rather than procuring a dedicated 12MHz chip? 

    MCLK does not have to be supplied, but it certainly is the most common option and simplest from a configuration standpoint.  It does potentially add components to the system.

    Depending on the clocks the C5535 has, you might be able to use CLKOUT of the C5535 to source MCLK.  However, you will need to take care that this aligns with a frequency you desire.

  • 0 in reply to BrandonAzbell
    TI__Mastermind 23785 points

    I would like to clarify that CLKOUT is recommended for debug purpose only in the data manual under CLKOUT Pin section. This pin has not been characterized as a clock source like rise/fall time and duty cycle. System level verification is recommended for specific usage.

    Regards.

  • 0 in reply to Steve Tsang
    TI__Guru 64480 points

    Fair point, Steve.

    A different alternative might be to use the single-ended CLKIN, again, if this is an appropriate frequency.

    Otherwise, utilize the PLL inside the AIC3204 to use BCLK.