OMAP35X byte wide device access

I believe the byte alias access is referring to this particular definition of aliasing, where it means that a data location can be accessed through multiple sources, which would correspond with what would happen if you had no A0 pinned out. It seems to me that you would end up with every two bytes in memory being identical, so as you describe, reading an int would have to be done by reading 8 bytes and throwing out every other byte.

For better or worse I have not run into this actually being done yet, as most engineers I have worked with were either using a 16bit interface or were just working with NAND where this does not apply.

Thanks,  thought that was the case but wanted to confirm before I had to figure out how to design around it.  Am looking at trying to use the OMAP 35X to upgrade an existing product in which case I'm stuck with what is there, hence some byte access is needed.

Kev

Kev,

I realize it has been over a year, but I was wondering if you went with the soft solution of sorting bytes out for the 8 bit GPMC interface? I believe you are the first/only user I have come across personally to leverage the 8 bit asynchronous capability of the GPMC, so I was wondering if you ran into any other snags (or if my interpretation of 'byte-alias accesses' was incorrect somehow).

Hi Bernie,

I ended up getting pulled off the project and was doing a bunch of L137/138 work.  Am ironically now back on it as of a week ago.  From everything I can see you were probably correct in your assumption.  Question becomes what happens if you do a single 8 bit access on an odd boundry.  Some processors generate an exception with this due to memory alignment issues, others will do two byte reads and toss one of the bytes.

In our hardware design I'm going to create a bunch of A0 lines with a flip flop that can be preset to a 1 or 0, use software to mutex them for differing threads, then use memcpy to move the data I need.  Each access will toggle the A0 line automatically and hopefully resolve the problem, assuming I use even boundries.  With odd boundries I'll just have to see what happens but with the preset capability should be OK.

I am using the DSP to deal with this mess so Linux does not have to.  A waste of performance but given the legacy world is 8 bit don't have much of a choice.

Wish I could give you a better answer, and should you find more information please post it.  Odds are I'll get yanked before we spin hardware, else expect I'll know for sure, the hard way, by the end of the summer ;-)...  May even hook up a logic analyzer before that for confirmation.

Kev

bridgenet said:

Question becomes what happens if you do a single 8 bit access on an odd boundry.  Some processors generate an exception with this due to memory alignment issues, others will do two byte reads and toss one of the bytes.

My guess is that it would do the latter and perform two reads, at least this is how you would get the 'byte-aliased' effect.

I will see what else I can dig up on this topic internally and post back here if I come across anything useful.