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AM1808 AIS bootloader SPI clock frequency

Other Parts Discussed in Thread: AM1808, OMAP-L138

Hi,

I boot my custom AM1808 board via SPI1 FLASH using AIS just as per the LogicPD board. It works fine.

However, now my program has got quite large, the time to copy from FLASH to DDR is significant. Document SPRABA5B says the bootloader forces a default SPI speed of 800kHz with a 24Mhz clock. We know we can run the SPI after boot at 37.5MHz.

This same document explains that the SPI speed can be programmed using the combined PLL and clock configuration command, using the bottom 8 bits of the 3rd argument to program the SPIFMT register.

Unfortunately this appears to have no effect on the FLASH->RAM copy time, whatever value I put there. The SPIFMT register appears to be programmed correctly. I have also tried explicitly setting the clock using the clock configuration AIS function, but again to no effect.

As a test, duplicating this copy in application code confirms that it can run much faster, so how can I achieve this from AIS?

Regards,

Chris

  • Hi Chris,

    What is the target SPI frequency are you planning to program through AIS utility?

    SPI devices support speeds up to 33 MHz .Mentioned in the same document SPRABA5B

    After you programmed the SPI speed in the PLL and SPIFMT register have you tried measuring the new frequency through scope?

    In that case AISGEN utility will force to the default value

    Regards

    Antony

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  • Hi Antony,

    Thanks for your reply. Agreed about the 33MHz - it's just that we appear to be able to run faster in 'real life', so a prescale of 3 should work. I've tried reducing it to 33MHz and below without any observable difference.

    After further investigation, I don't think SPI speed is the main issue - it is certainly running much faster than 800kHz, so I believe the programmed value has been accepted.

    To put some figures on it, copying 6Mbytes takes around 22s using the bootloader, and around 7s using my app. Does the bootloader insert wait states?

    I think my question has become: "why does copying the FLASH contents to RAM using the bootloader take longer than when I do it from my program?"

    The PLLs and DDR are initialised the same in both cases.

    Regards,

    Chris

  •  

    Hi Chris,

    Is the bottleneck that you refer to taking place while U-Boot is being copied from SPI into internal memory or when U-Boot is copying application code from SPI to memory?

    See the following wiki article for explanation of how other users have optimized this process. 

    http://wiki.davincidsp.com/index.php/All_This_For_1_Second_Boot

    And also see the OMAP-L138 boot bench marks

    http://processors.wiki.ti.com/index.php/OMAP-L138_Boot_Benchmarks

    See the related E2E thread from other customer where the total size is around 6.3 Mb and at 0.6 Mb/s it takes about 10 seconds to copy.

    http://e2e.ti.com/support/dsp/omap_applications_processors/f/42/t/41068.aspx

    Regards

    Antony

  • Hi Antony,

    I'm not using U-Boot or Linux; neither do I use AISgen. I use hand-coded AIS commands at the start of my image file, stored in SPI FLASH.

    The process which takes too long is the copying of the main bulk of my image from SPI FLASH to DDR. This is done via the AIS Section Load command. I have previously called Sequential Read Enable, and configured the PLLs and DDR.

    Using the formula given in the second link you provide, time_x = time_1kb + size_x * (time_124kb - time_1kb) / 123, gives a predicted SPI FLASH boot time of approx 14s for a 6Mb image. This formula appears to relate to a CPU clock of 456MHz and an SPI frequency of 45.6MHz. Given that I have a CPU clock of 300MHz and an SPI frequency of (say) 33MHz, a crude scaling adjustment gives a predicted boot time of 21s, which is only slightly longer than that seen.

    So, a logical conclusion would be that this is what we are stuck with; the AM1808 bootloader simply won't run any faster. Is this true?

    Regards,

    Chris