GigE on OMAP3530

ler

Other Parts Discussed in Thread: OMAP3530

I am designing a GigE interface to hang on the OMAP3530. Have mapped it into GPMC space and based upon data sheets, looks like

I can read the GigE device at about 400Mbits/second. Once the 16-bit chunks are read from the device, need to write it to LPDDR memory. Am wanting

to parallelize this effort so that don't take a write hit as well. Can this be done? Any examples out there I could reference?

over 16 years ago

0 Bernie Thompson TI over 16 years ago

TI__Mastermind 41665 points

It sounds like the best solution for something like this would be to use the DMA, if your GigE interface device can be read by the DMA than you could have your driver utilize the DMA to make the recurring transfers which would mean that the data is both transferred directly between the GPMC and the DDR and that the transfer is done independently of the CPU performing any reads and writes directly. Unfortunately I do not know of any good examples of this for the OMAP3, and I am not sure if the existing network driver is even using DMA (makes no mention of it in the driver documentation). The driver docs to mention that there is a SDMA driver of the Linux DMA driver type, but there is little else on it.