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OMAP3530/25/15/03 and PMIC clock specifications

A. Musah
Prodigy 10 points
Other Parts Discussed in Thread: TPS65950, OMAP3503

Questions and Answers to clarify some clock specs:

We are analyzing the clock requirements for the TPS65950 and OMAP3503. The input for the TPS HFCLK is 26MHz oscillator. 32.768KHz crystal is connected to TPS for 32KHz CLOCK.  The TPS 32.768 KHz and 26 MHz outputs are connected to OMAP processor. Can you please provide the following clarifications 

32.768KHz Clock:

  1. The Duty Cycle requirement for OMAP3503 32.768KHz Input clock is not available in the datasheet.

[AM] Looking into this. 

HFCLK (26MHz) Clock:

  1. The OMAP3503 datasheet Table 4-1 specifies 50ppm and Table 4-5 specifies 25ppm. Which one is correct

[AM] 50ppm. This typo will be corrected in next update to the data manual.

  1. The OMAP3503 clock duty cycle requirement is 45 to 55 %. The HFCLKOUT duty cycle from TPS65950 is 40 to 60 %. The ZOOM SOM, TI Evaluation board and Beagle boards use the output of TPS65950 clock for OMAP processor. How the duty cycle requirement is met if the TPS output is used for OMAP.

[AM] TPS65950 simply transmits square clock input to output, so the HFCLKOUT duty cycle should be the same as the HFCLKIN duty cycle spec of 45%-55% for square clock input. The 40-60% spec on TPS65950 clock output is a typo and will be corrected. 

 

  1. The rise time and fall time requirement for the TPS65950 HFCLK is 0.05*Tclk. With 26MHz clock frequency, the rise and fall times are 1.92ns. The Beagle board / ZOOM SOM use 26MHz oscillator having 6 ns rise time and fall time. The TI Evaluation board used series termination resistor at the output of the buffer. Can you please confirm the rise and fall time requirements.

[AM] The HFCLKIN rise and fall time was characterized to 5ns for all 3 HFCLK frequencies supported.

  1. The TPS65950 HFCLKOUT enable time from the CLKEN high in the power ON sequence is 5.3ms. Is this the requirement for the Oscillator enable time. The NRESPWRON release after the HFCLKOUT is 61us. If the enable time of the oscillator is 10ms, will the NRESPWRON be held until the HFCLKOUT availability?. The ZOOM SOM use 26MHz oscillator having 10ms enable time in worst case.

[AM] The TPS65950 timings are fixed. The design must ensure that the oscillator is stabilized by the time NRESPWRON is released as TPS65950 will not extend the NRESPWRON duration. An external reset supervisor could be used to delay the NRESPWRON as needed for a custom design.