Vision Mid Count event and hardware breakpoint

Hi Johnny,

I assume you are working with CCStudio, right?

Make sure you are connected to the M3 core first, see the thread below:

http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/716/p/241463/847491.aspx

Johnny Kim1 said:

"Error programming AET Job: There is no AET resource to support this job."

These type of errors are discussed in the CCStudio forum (you can ask there):

http://e2e.ti.com/support/development_tools/code_composer_studio/default.aspx

Here are some e2e threads from the CCStudio forum, that discuss this:

http://e2e.ti.com/support/development_tools/code_composer_studio/f/81/t/275017.aspx

http://processors.wiki.ti.com/index.php/Stellaris_support_in_CCS#Hardware_Breakpoints_Limitations

http://e2e.ti.com/support/development_tools/code_composer_studio/f/81/t/87789.aspx

http://e2e.ti.com/support/development_tools/code_composer_studio/f/81/t/141019.aspx

http://e2e.ti.com/support/development_tools/code_composer_studio/f/81/t/32556.aspx

Best regards,
Pavel

Hi Pavel.

Yes, I am working with CCSv5.3.
I already visited the links you mentioned.

Vision Mid has CortexA8 and DSP also and I can set hardware breakpoint and count event.
But I cannot set those things on M3 core only.

I am not sure but it seems that this is related to M3 core HW limitation in Vision Mid.
So I am trying to find some advice for this in this forum.

Thank you.
Regards,
Johnny

Johnny,

I have DM814x EVM, I can try to reproduce this issue with my EVM and CCStudio. Can you send me the steps to reproduce the issue on my side?

Regards,
Pavel

Hi Pavel.

Reproduce steps are below.
1. Connect emulator to PC and EVM board.
2. Power on EVM board.
3. Launch target configuration.
4. Connect A8 core, then it will run GEL file(av_bios_sdk.gel).
5. Connect M3 core and load 'avsk_app_m3video_debug.xem3' to the core.
6. Set hardware breakpoint in the main() function.

Thank you.
Regards,
Johnny

Johnny,

Do you have Cortex_M3_RTOS core, Cortex_M3_ISS core and Cortex_M3_SECSS core? To which one you connect?

Did you create this avsk_app_m3video_debug.xem3 file with CCS or it is external for CCS?

Regards,
Pavel

Hi Pavel.

I tested this on CortexM3 RTOS core.
"avsk_app_m3video_debug.xem3" file is included in AV BIOS SDK and it can be built with CCS.

Thank you.
Regards,
Johnny

Johnny,

The feedback from the CCS team is that DM8148 Cortex-M3 core supports HW breakpoint and counter. Profile clock is not supported.

I am trying to reproduce this on my side. Could you please send me the steps, how exactly you are building executable files (xem3 or other) for the M3 core with CCS?

As I am working with DM814x EZSDK (not AV BIOS SDK) I have no "av_bios_sdk.gel" nor "avsk_app_m3video_debug.xem3" files. That is why I am trying to build (under CCS) executable file (from main.c) to load and run on Cortex-M3 core.

Best regards,
Pavel

Johnny,

I successfully generate *.out file for Cortex-M3 from the CCS. I needed to change the compiler options from be32 to little endian, and from from 7A8 to 7M3 target processor.

Now I can load and run *.out files on Cortex_M3_RTOS core. And yes, I can not set HW breakpoints, when I try I have:

Error enabling this function: There is no AET resource to support this job.

When I modify the "Program/Memory Load Options" in the menu:

Project -> Properties: Debug Device Cortex_M3_RTOS

Program/Memory Load Options

I removed the default set up for "Halt at Program termination", "Enable CIO functions use" and "Enable Semihosting". Then rebuild and get new *.out file. Now I can set HW breakpoints.

Depending on the device, there are a limited number of these resources. Older MSP430 and C28x devices just have 2. Other devices may have more. I’m not sure how many are on M3. But once you use up all these resources, you will get that error message. Note that by default, the debugger will try setting some “hidden” breakpoints. Like at the start of main and at the exit point of the application (C$$EXIT). Those would use up two resources. Single stepping automatically uses one. Enabling the profile clock would use one. Etc.  You can disable the auto-setting of the breakpoints I mentioned via the debugger options. Be aware of all places where resources may be being used.

Regards,
Pavel

Johnny,

Regarding the count event, this resource is not supported at all for DM814x Cortex-M3 core. I tried to enable the count event without loading a program, and it gives the same error, you can try the same at your side.

When I try to enable HW breakpoint without loading a program, it works. I can enable 6 HW breakpoints before the message occur (no ATE resource for this job). Thus the DM814x Cortex-M3 core supports up to 6 HW breakpoints.

Regards,
Pavel

Johnny,

Note also that that HW breakpoints are NOT supported on Cortex-M3 for addresses beyond 0x20000000. This is a known limitation.

The M3 on this device is blackboxed, so CCS testing and support for it was probably minimal.

BR
Pavel

Hi Pavel.
First of all, I want to say thank you for your support.

Regarding Count Event, I found below wiki page and it states that Stellaris M3/M4 can support Count Event.
http://processors.wiki.ti.com/index.php/Watchpoints_for_Stellaris_in_CCS
Could you check the site?

Thank you.
Regards,
Johnny

Johnny,

Johnny Kim1 said:

Regarding Count Event, I found below wiki page and it states that Stellaris M3/M4 can support Count Event.
http://processors.wiki.ti.com/index.php/Watchpoints_for_Stellaris_in_CCS
Could you check the site?

I try to set Count Event on DM814x Cortex-M3 according to this wiki site, but I always have the error report (no ATE resource for this job). Thus I assume Stellaris Cortex-M3 supports Count Event, but DM814x Cortex-M3 does not support Count Event.

Best regards,
Pavel