hyplnk_K2KC66BiosExampleProject
pdk_keystone2_3_00_01_12\packages\exampleProjects\hyplnk_K2KC66BiosExampleProject
have uncommented the loopback enable line in the hyplnkLLDCfg.h
#define hyplnk_EXAMPLE_LOOPBACK
The example hangs with CSL_HyperlinkSerdesGetStatus always returning PLL NOT LOCKED...
/* SB PLL Status Poll */
do
{
pllstat = CSL_HyperlinkSerdesGetStatus(baseAddr,
hyplnk_EXAMPLE_MAX_LANES);
}while(pllstat == CSL_SERDES_STATUS_PLL_NOT_LOCKED);
On closer inspection the function
CSL_IDEF_INLINE CSL_SERDES_STATUS CSL_HyperlinkSerdesGetStatus
(
uint32_t base_addr,
uint32_t num_lanes
)
{
uint32_t i;
CSL_SERDES_STATUS retval;
/* Check PLL OK Status Bit */
retval = (CSL_SERDES_STATUS)CSL_FEXTR(*(volatile uint32_t *)(base_addr + 0x1ff4), 28, 28);
/* Check Lane # OK Status Bits */
for (i=0; i < num_lanes; i++)
{
retval = (CSL_SERDES_STATUS)CSL_FEXTR(*(volatile uint32_t *)(base_addr + 0x1ff4), (8 + i), (8 + i));
}
/* Check Lane SD Status Bits */
for (i=0; i < num_lanes; i++)
{
retval = (CSL_SERDES_STATUS)CSL_FEXTR(*(volatile uint32_t *)(base_addr + 0x1ff4), (0 + i), (0 + i));
}
return retval;
}
that checks this seems to check 2*(num_lanes) of status bits... I found the lane # ok [0] status bit was being set, but all other checked bits were not set
the function would fail because only the very last bit checked effects the outcome of the function (is this an error?)
