How long from the rise (deassertion) of RESET until SPI activity related to SPI boot begins? What I am really interested in knowing is if the SPI activity can begin before RESETOUT has deasserted.
Thanks,
Brad
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Hi Brad,
Please refer the datasheet SPRS563F page no 61 for RESET high to RESETOUT high (de-asserted) mentioned in the Table 5-2 Reset timing requirements Note (4) 4096 cycles for warm reset and 6192 cycles for Power-on reset.
You will not see any activity on the SPI pins before RESETOUT de-asserted.
Regards
Antony