Hi all
I am working on 2-d EDMA to transfer data from external to internal memory . My 2 d dma is working fine without using fifo width ( enabling sam ) . Now i want to do a dma which requires SAM to be enabled in the OPT register . I ahve selected the FIFO width to be 8 bit and the source adress is alligned to character ( byte alligned ) . when I start dma the address allignes itself to some adress which seems to be 256 bit alligned and getting an TRERR error in TPTCj_ERRSTAT register. Note : i am enabling only SAM
I feel i am missing a setting in some register .
Regards
Ravi