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L137 SPI and >16-bit transfers

Joseph Woodward
Prodigy 210 points

Is it possible to communicate with a device expecting 24-bit SPI transfers?

Having looked at the SPI documentation  (sprugc1a.pdf) it seems clear that the SPI peripheral can only do 2-bit to 16-bit transfers without having to re-assert the chip select.

However, I need 24-bit transfers...

Is it possible to control the chip-select manually and then perform two transfers (say, a 16-bit transfers followed by an 8-bit transfer)?

Would I need to use a GPIO for the chip-select and control the chip select manually, or does the SPI peripheral allow this level of control of the chip select?

Would it be easiest to do this transfer by only using GPIOs to emulate SPI and ignore the SPI peripheral?

This post seems relevant but doesn't describe how to control the chip-select: https://community.ti.com/forums/t/881.aspx

Any ideas welcome!

And could I suggest that the SPI peripheral gets enhanced to allow multiple transfers with a continuous chip select (more useful if FIFO buffering if provided for up to N words to be transfered at once), or at least allowing 32-bit transfers!

  • TI__Mastermind 25866 points

    I thought the way to do 24-bit transfer is by doing 3 8-bit ransfers.  You have to set CHARLEN to the right value (p. 55 of  sprugc1a.pdf).

    Does that work?

  • in reply to Joe G.
    Prodigy 210 points

    The documentation states:

    "Character length from 2 to 16 bits: The character length is configured by the SPIFMTn.CHARLEN field.2"

    So, yes this can be set to an 8-bit transfer.

    However, from my understanding of SPI 3 8-bit transfers is *very* different to a single 24-bit transfer. Each 8-bit transfer will lower the chip select for the appropriate slave (as the CS is nominally active low)  and then raise it again. Hence this will happen 3 times.

    Nominally each time the CS toggles like this the slave device will see it as a "fresh" transfer, and not as a continuous transfer.

    What I need is a continous 24-bit transfer without a drop in the chip select.

  • in reply to Joseph Woodward
    TI__Intellectual 1495 points

    CSHOLD bit field in SPIDAT1 allows you to extend CS for multiple transmissions. You basically  set it for the first 2 transmissions and then clear it for the final.

    Other option would be to use CS as a GPIO pin and then control it manually, but the first suggestion is a little bit easier to manage.