1. --- I am looking for code that does 32-bit FIR to run on the C64x+ in the DM3730. The DSPLIB seems to operate on 16-bit data but my application requires 24-bit data input. Is there example code for 32-bit FIR running on the C64x+ available? Is there 32-bit FIR code using IQmath to implement FIR with Q24 or Q31?
2 --- My initial goal is using 64 tap FIR with a sample coming it at 48 KHz. I also want to run 32 of these FIR concurrently with a new sample for each of them at 48 KHz. Which DMA (IDMA or System DMA) is best to use to transfer the data samples from IO to C64x+ L1D configure as Data RAM? Frequently I also need to do some filter coefficient update by the ARM processor; which DMA is best to use to transfer the coefficient to the C64x+ L1D RAM?
3 ---- Eventually I will need to increase to 200-tap FIR which resulting in using 51-KB of memory which is more than the 48-KB L1D available. What is the memory for the C64x+ 32-KB L2 RAM and the memory cycle for the DM3730 64-KB on chip RAM?
With the dual math channel in the C64x+ core, how many 32-bit FIR can it do concurrently? Let assume that the core can do 2 FIR's concurrently, then perhaps a better method is to store the data and the coefficients in the DM3730 64-KB on chip RAM (or external DRAM) and then use the ping-pong concept to DMA the next set of coefficients and data into the C64x+ L1D RAM. Which DMA is best use to do this function?
Regards,
Sy
