OMAP3530 CBC Package Discrepancies

This is a great question, I went through the pins you mention and it looks like you are largely correct, there are definitely some issues with the CBC datasheet documentation. In general table 2-2 should be correct; it seems that some of the later tables were corrupted for the CBC package. At the moment I can only give my educated guess on what these pins should actually be and I will have to confirm these internally but it looks like:

gpmc_d0 seems to be a typo in table 2-7
The I2C balls seem to be incorrect in table 2-14
mm3_rxdm appears to be a typo in table 2-19
hsusb1_data7 appears to be a typo in table 2-19
etk_ctl and etk_clk signals appear to be incorrectly swapped in table 2-21
rsv01 is only on CBB, this is shown in table 2-26?
gpio_21 appears to be a typo in table 2-27
gpio_75 definitely has something missing in the pinmux table
It also appears that all these GPIOs are not properly documented in table 2-27
cap_vdd_wkup is present on the other two packages, not sure if it really applies to CBB
pop_ddr_vdd_ft does seem typoed in table 2-28, I am not sure why it does not show up in table 2-2
pop_reset_rp is available on the CBC package top only, I believe this is correct as CBC is a lower pin count part

I will certainly be passing these on to the datasheet owners to get clarification and fixes for the next revision of the datasheet.

As Bernie mentioned, we will ensure the documentation team corrects these errors.

In the interim, below are the CBC ball assignments for the signals you mentioned.

Signal                  Bottom ball      Top pad
gpmc_d0              AA2                    U2
i2c3_scl                AB4
i2c3_sda              AC4
i2c2_scl                C2
i2c2_sda              C1
mm3_rxdm          K3
hsusb1_data7    AA3
etk_ctl                   AB3
etk_clk                  AB2
rsv01                    AE19
gpio_21                AD2
gpio_75                AD24
gpio_137              M3
gpio_138              L3
gpio_139              K3
gpio_140              P3
gpio_141              N3
gpio_142              U3
gpio_143              W3
gpio_150              W2
gpio_152              V3
gpio_153              U4
gpio_154              R3
gpio_155              T3
cap_vdd_wkup    K14
pop_ddr_vdd_ft   AF13                    AA11

I don't have any information on the below, but I believe this is not available on the CBC package.  The comments for the CBB package indicate the suggestion is to connect to sys_nreswarm anyway.  It may be this has already been done with the CBC package.
pop_reset_rp

Hi Bernie,

Thank you for your response.

Regards

Hi Brandon,

It seems that we were leaning in the right direction as far as our assuptions on which table was correct.

Thank you for your prompt reply.

Regards

Hi Brandon,

After updating my library part with the information you provided, I have three questions:

1. You indicate that RSV01 is on pin AE19, however, on P80 of the OMAP3530.pdf dat sheet it indicates that vdd_dsi is on this pin?

2. You clarify that pop_ddr_vdd_ft is on AF13.  What about pop_flash_vpp_ft, is it allocated to a pin?

3. Any pin allication for pop-reset_rp yet?

Thank you

Howard Robson said:

1. You indicate that RSV01 is on pin AE19, however, on P80 of the OMAP3530.pdf dat sheet it indicates that vdd_dsi is on this pin?

My suggestion would be to put a cap to ground on AE19 at this time.  It is possible it could be left floating, but a cap to ground would be better.  As you have noted, the datasheet needs to get cleaned up of these discrepancies.

Howard Robson said:

2. You clarify that pop_ddr_vdd_ft is on AF13.  What about pop_flash_vpp_ft, is it allocated to a pin?

As it turns out, this is a dual role pin but defined by the POP memory itself.  The bottom ball AF13 is connected to top pad AA11.  The POP memory defines if this is a pop_ddr_vdd_ft or a pop_flash_vpp_ft.

Howard Robson said:

3. Any pin allication for pop-reset_rp yet?

From what I have found, pop-reset_rp on the Top Pad AA5 is already connected to sys_nreswarm (bottom ball AD7).