About setup time of High-speed mode

Satoshi Okamoto

Hello.
I was measured for each power supply is connected to the DM8168 for evaluation.
A circuit configuration is the same as NETRA EVM (DWG No.512872-0001).
However , the pull-up resistor is using 10kΩ.
I confirmed the timing of the SD for evaluation.
No problem in Normal mode and Identification mode.
There is a problem that does not satisfy the set-up time in the High-speed mode.
Please refer attached waveforms.

CH1(Yellow):MMC_CLK　CH2(Blue):MMC_CMD　CH3(Purple):MMC_DAT0

Setup time is about 3.2ns. Therefore , it does not meet the minimum specifications 4.1ns.
Hold time is about 15.0ns. Therefore , it is meet the specification of minimum 1.9ns.
it is meet specifications other than setup time .

Is it permissible that the setup time in High-speed mode is unsatisfying?
Is there any solution for problem in the case?

Regards,

-okamoto

over 11 years ago

0 Tom Johnson 16214 over 11 years ago

TI__Mastermind 46460 points

Okamoto-san,

What interface is this?

Tom

0 Hyun Kim over 11 years ago in reply to Tom Johnson 16214

TI__Genius 14965 points

Okamot-san,

What is the SD interface MCLK operation frequency?

Regards,

Hyun

0 Satoshi Okamoto over 11 years ago in reply to Tom Johnson 16214

Intellectual 485 points

Hi, Tom
Thank you for reply. I will answer a questions for you.
The above figure is the waveform of the MMC interface.
Respectively , and is the clock signal , the command signal , the data signal.
I use to boot from the SD card.
Incidentally , it does not satisfy the setup time for DATAx signals and CMD signals.

Regards,

-okamoto

0 Satoshi Okamoto over 11 years ago in reply to Hyun Kim

Intellectual 485 points

Hi, Hyun

Thank you for reply. I will answer a questions for you.
SD_CLK operation Frequency is 48MHz.
It's running maximum frequency(48MHz) of recommended.

(EZSDK_v5.05.01.04(Linux Kernel:v2.6.37) is also set to 48MHz in High-speed.)

Regards,

-okamoto

0 Hyun Kim over 11 years ago in reply to Satoshi Okamoto

TI__Genius 14965 points

Hi Okamoto san,

Have you tried with 51K ohm pull up resistor which has used in the EVM circuits?

Regards,

Hyun

0 Satoshi Okamoto over 11 years ago in reply to Hyun Kim

Intellectual 485 points

Hi, Hyun
Thank you for reply. I will answer a questions for you.
I think that was also confirmed in the EVM board , but it did not satisfy the set-up time.
I think smaller constant is better resistance in order to satisfy the rise time.

Regards,

-okamoto

0 Hyun Kim over 11 years ago in reply to Satoshi Okamoto

TI__Genius 14965 points

Okamoto san,

Is there any functional failure observed?

When the pull up resistor changed from 51K to 10K, did it help?

Regards,

Hyun

0 Satoshi Okamoto over 11 years ago in reply to Hyun Kim

Intellectual 485 points

Hi, Hyun
Thank you for reply. I will answer a questions for you.

Not problem with the operation of SDIO.
with start-up failure does not occur.
However, it does not give satisfactory access specification of SD.
I'm searching for a way to satisfy the access specification.
I think 51K were a issue both the rise time and setup time.
(Measured by EVM evaluation board )

Regards,

-okamoto

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About setup time of High-speed mode