OMAP Silicon version or Device ID

Vijay said:

Is there a way to find out the silicon versions of the OMAP chip. Lets say suppose how can anyone make sure that the chip on the OMAPEVM is of ES2.0 or 2.1 etc? Does any register store this information (Device ID)? Can that register be accessed or read from the Emulator/CCS?

Yes, please consult the Technical Reference Manual (SPRUF98) for this information.  The CONTROL_IDCODE register provides the information you are looking for.  This is documented in Section 1.5.2 of the aforementioned TRM.

Assuming OMAP35x, although the answer may also apply to other devices.

If all you need is to find out the silicon version on EVM (one time, or at least not often), then a visual inspection of the part number inscribed on top of the silicon may sufice (see revision identification section on errata  http://focus.ti.com/lit/er/sprz278c/sprz278c.pdf );

However, if you actually build products with different silicon revs and your software needs to identify the proper silicon rev and behave accordingly, there is a register field (CONTROL.CONTROL_IDCODE.VERSION) that has this information.  Please see TRM for more details on this (http://focus.ti.com/lit/ug/spruf98b/spruf98b.pdf)

Hi Brandon,Juan,

Thanks for the pointers. I connected the OMAP3EVM to the XDS510USBJTAG Emulator using CCSver3.3. I looked in to the memory location 0x4800244C and was able to read out the value 0x00000C00. As per the spruf98b.pdf(TRM) and as mentioned in the Table 1-6, the chip is OMAP3530. However, if i try to access the CONTROL.CONTROL_IDCODE[31:0]  at the address 0x4830 A204 i'm only seeing ------ on the CCS memory window. Are these protected fields? Do i have to configure any other register befor looking in here? Am i missing out anything?

I'm more interested in knowing about the Silicon version.

Vijay said:

However, if i try to access the CONTROL.CONTROL_IDCODE[31:0]  at the address 0x4830 A204 i'm only seeing ------ on the CCS memory window. Are these protected fields? Do i have to configure any other register befor looking in here? Am i missing out anything?

This is likely caused by CCS not declaring the region of memory around 0x4830A000 to be available.  This is configured, typically, by the GEL file used with CCS.  I reviewed the c:\<TI_CCS_INSTALL_DIR>\cc\gel\omap3530_cortexA.gel file and found the region of memory around 0x4830A000 is not enabled.
If you enable it with a statement such as the following, CCS will not get in the way of the memory window and you should see actual contents.

    GEL_MapAddStr(0x4830A000, 0, 0x00000004, "R|W|AS4", 0);  /* CONTROL_IDCODE */

EDIT :

This should really be the following:

    GEL_MapAddStr(0x4830A204, 0, 0x00000004, "R|W|AS4", 0);  /* CONTROL_IDCODE */

Hi Brandon,

Thanks for the suggestions. I did edit the "omap3530_cortexA.gel" file and reloaded it. This time i was able to see some value @ 0x4830A000, but not a valid data. It read 0x0BAD0BAD.

So it seems there is an easier way to find the revision in software, I was under the impression that one would have to access a CP15 register to find out the revision based on the Main ID register within the Cortex A8 as discussed at the ARM site below.

http://infocenter.arm.com/help/topic/com.arm.doc.ddi0344h/Bgbiddeb.html?resultof=%22%6d%61%69%6e%22%20%22%69%64%22%20

Accessing the CONTROL.CONTROL_IDCODE register as suggested here should make this much easier and allow easy verification of revision from CCS which is good given that most OMAP3 boards out there now have the top side marking covered by a PoP memory. We should probably modify the silicon errata to mention this, as currently it just suggests that the difference is in the Cortex version which can be found with the Main ID register (silicon errata is where I usually go to find how to determine silicon revisions).

Unfortunately I could not say why CCS is unable to read the value for Vijay, I may have to try this out.

I realize this is an extremely old thread.  However, I wanted to post my findings in case there are others running into similar issues.

The default GEL files provided do not declare the memory address 0x4830A204 as available.  Instead, due to the fact it is not declared, opening a memory window in CCS will cause it to look like --------.
Only when one declares 0x4830A204 as RAM will the actual contents be shown.

    GEL_MapAddStr(0x4830A204, 0, 0x00000004, "R|W|AS4", 0);  /* CONTROL.CONTROL_IDCODE */

When enabling this, the contents of the CONTROL.CONTROL_IDCODE were observed.  I did not get the 0x0bad0bad as reported by Vijay, however.

EDIT :

My previous post above had an incorrect address of 0x4830A000.  This does result in 0x0BAD0BAD as there is nothing really there.  This may be the source of confusion with Vijay's results.
I was the source of that confusion.

Hi Brandon,

Thanks for checking this mail thread. I edited the GEL file as per your suggestions. I'm seeing the correct value of the CONTROL.CONTROL_IDCODE as per the TRM.

Thank you very much.