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Am335X Interface to Switch via MDIO/MDC.

irwin weiss
Intellectual 400 points

Other Parts Discussed in Thread: AM3354

We have our AM3354 CPU connected to a Marvell switch chip. We can access page 0 standard regsiters. But we cannot access the extended page registers. Seems like something keeps overwriting the page select register.

  • 0
    TI__Guru**** 393215 points
    What software are you using? You should be aware that the AM335X MDIO is typically used to access external PHYs, so if your switch has additional registers that you need to access, you will probably need to adapt the software to your requirements.
  • 0 in reply to Biser Gatchev-XID
    Intellectual 590 points

    Hi, Biser:

    We are using the TI's Sitara software package for u-boot and kernel.

    I have two problem and one question:

    1. I use the CPSW mdio/mdc interface to access the Marvell switch 88E6131. I define the MDIO/MDC clock is 5MHz. When I read the registers in switch, most time it returns correct value, some time it is wrong value, some time it is 0xFFFF. What setting I should adjust to make this work correctly.

    2. In Marvell switch there are extended registers which requires first write to register 0x16 then read/write. Since CPSW MODI/MDC has automatically polling of the PHYs, Is this a problem to access extended registers.

    3. The CPSW is set to MII interface to connected to Marvell switch port 3 (100 PHY mode). Should I set CPSW has one slave, PHY_ID is 3 or should I set the CPSW has no slave.

    Thank you!

  • 0 in reply to Jin Yu1
    TI__Guru**** 393215 points
    Hi Jin,
     
    1. According to the AM335X Datasheet, Rev. F, Table 5-7 the minimum cycle time for MDC is 400ns, which means a maximum frequency of 2.5MHz. Set a lower MDC frequency and see if it helps with your issues 1 and 2.
    3. I don't know the answer to this one.
  • 0 in reply to Biser Gatchev-XID
    Intellectual 590 points

    Hi there:

    Can somebody in TI answer my third question. Now I set up the Marvell switch, it is passing traffic to the port connected to CPSW, And I config the CPSW has no PHY. Then I try to ping outside, it failed.

    Thank you!

    Jin

  • 0 in reply to Jin Yu1
    TI__Mastermind 27890 points

    If I understand the question, then yes, you should set a PHY address on CPSW.

    The CPSW expects to communicate with attached PHYs via the MDIO PHY address. Although you are connecting a switch port that is emulating a PHY rather than an actual PHY, it still needs a valid address as CPSW doesn't know the difference.

  • 0 in reply to -DK-
    Intellectual 590 points

    The network is working now after configuring the Marvell switch as CPSW's PHY.

    Thank you!

    Jin