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C6678 cannot respond to hyplnk int for 2nd time

YUCHAO WANG
Expert 1265 points

Hi TI enginneer:

         We want to do following things:

         C6678 B go into a loop,waitting for a intc from C6678 A.When intc come,B do some operations,then go into loop again.

         C6678 A send a intc trigger by hypelink to C6678 B,then wait for sometime ,send next intc,and so on.

         But then we find that C6678 B can only respond to first intc, 2nd,3th……intc are ignored.

         Then we make some change,:

           A begin                                             B wait for A's intc

         A send intc to B                ------        B get intc

         A wait for B's respond     ------        B send a intc back to A

         A get intc                             ----       B do its operation

          A  send next intc              ------       B wait for A's intc

         Then we find that in the sencond loop,B get the intc ,but A never get the respond intc.  

          We can make sure that we clear the interrupt bit in the ISR.

         We don't know why.Can you tell us why doesn't the C6678 get the 2nd intc?Thank you very much.

         

         

  • 0
    TI__Guru* 95265 points

    I felt you missed some steps on B side's ISR routine. Typically inside the ISR:

    - Disable host interrupt
    - do some operations

    - clear the Hyperlink interrupt by reading Interrupt Priority Vector Status/Clear Register (Base Address + 0x0C), then writing what you read back into this register: "When read, this field displays the vector that is mapped to the highest priority interrupt bit that is pending from the Interrupt Status/Clear Register, with Bit 0 as the highest priority, and Bit 31 as the lowest. Writing back the vector value into this field will clear the interrupt."

     - clear system interrupt

     - Enable host interrupt

    - generate interrupt to Hyperlink side A

    Hope this help!

    Regards, Eric